Designing VFs by applying genetic algorithms from nullator-based descriptions

An automatic method is proposed to design CMOS compatible voltage followers (VFs) by applying genetic algorithms. It is described how an automatic system can deals with huge search spaces to design practical VFs by performing evolutionary operations from nullator-based descriptions. The proposed met...

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Bibliographic Details
Main Authors: Tlelo-Cuautle, E., Duarte-Villasenor, M.A., Reyes-Garcia, C.A., Fakhfakh, M., Loulou, M., Sanchez-Lopez, C., Reyes-Salgado, G.
Format: Conference Proceeding
Language:English
Subjects:
Algorithm design and analysis
Analog circuits
Analog computers
Circuit synthesis
Circuit topology
CMOS technology
Electronic design automation and methodology
Genetic algorithms
Space technology
Voltage
Online Access:Request full text
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Summary:An automatic method is proposed to design CMOS compatible voltage followers (VFs) by applying genetic algorithms. It is described how an automatic system can deals with huge search spaces to design practical VFs by performing evolutionary operations from nullator-based descriptions. The proposed method consists of three main steps: generation of the small-signal circuitry, addition of biases, and sizing by using standard CMOS technology of 0.35 mum. Furthermore, it is described how to synthesize VFs by codifying the three main steps into three kinds of genes, and how to select small-signal, biased, and sized topologies to generate potential solutions. Finally, several applications are discussed along with the evolution of VFs to design current conveyors.
DOI:10.1109/ECCTD.2007.4529656