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Designing VFs by applying genetic algorithms from nullator-based descriptions
An automatic method is proposed to design CMOS compatible voltage followers (VFs) by applying genetic algorithms. It is described how an automatic system can deals with huge search spaces to design practical VFs by performing evolutionary operations from nullator-based descriptions. The proposed met...
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| creator | Tlelo-Cuautle, E. Duarte-Villasenor, M.A. Reyes-Garcia, C.A. Fakhfakh, M. Loulou, M. Sanchez-Lopez, C. Reyes-Salgado, G. |
| description | An automatic method is proposed to design CMOS compatible voltage followers (VFs) by applying genetic algorithms. It is described how an automatic system can deals with huge search spaces to design practical VFs by performing evolutionary operations from nullator-based descriptions. The proposed method consists of three main steps: generation of the small-signal circuitry, addition of biases, and sizing by using standard CMOS technology of 0.35 mum. Furthermore, it is described how to synthesize VFs by codifying the three main steps into three kinds of genes, and how to select small-signal, biased, and sized topologies to generate potential solutions. Finally, several applications are discussed along with the evolution of VFs to design current conveyors. |
| doi_str_mv | 10.1109/ECCTD.2007.4529656 |
| format | conference_proceeding |
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| ispartof | 2007 18th European Conference on Circuit Theory and Design, 2007, p.555-558 |
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| language | eng |
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| source | IEEE Electronic Library (IEL) Conference Proceedings |
| subjects | Algorithm design and analysis Analog circuits Analog computers Circuit synthesis Circuit topology CMOS technology Electronic design automation and methodology Genetic algorithms Space technology Voltage |
| title | Designing VFs by applying genetic algorithms from nullator-based descriptions |
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