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Effect of technology scaling on RF performance of the transistors fabricated by standard CMOS technology
Cut-off frequency (f T ) of 300 GHz and 230 GHz for NMOS and PMOS is demonstrated for transistors with a gate length of 35 nm fabricated by 45 nm standard CMOS technology. Current gain (H 21 ) and noise (flicker and thermal) is improved with scaling down technology. Power gain (G u ) increase is slo...
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Main Authors: | , , , , , , , , , , , , |
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Format: | Conference Proceeding |
Language: | English |
Subjects: | |
Online Access: | Request full text |
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Summary: | Cut-off frequency (f T ) of 300 GHz and 230 GHz for NMOS and PMOS is demonstrated for transistors with a gate length of 35 nm fabricated by 45 nm standard CMOS technology. Current gain (H 21 ) and noise (flicker and thermal) is improved with scaling down technology. Power gain (G u ) increase is slow down and even saturated at 45 nm as technology advances. Such saturation in power gain is attributed to rapid increase in g ds (drain conductance). Additional efforts are required to reduce g ds for continuous improvement in power gain with the scaling. V th optimization can be one of options to achieve better g ds . |
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ISSN: | 1529-2517 2375-0995 |
DOI: | 10.1109/RFIC.2008.4561498 |