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Optimization and characterization of a 1.5 kV, 100 sp rise time, all-solid-state pulse generator
A state-of-the-art, all-solid-state sub-nanosecond pulse generator is presented. The generator is characterized by three compression stages. The first stage uses a power MOSFET that initially provides current increase in the storage inductor and then breaks the current. The second stage uses a 3 kV...
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creator | Merensky, L.M. Kardo-Sysoev, A.F. Flerov, A.N. Pokryvailo, A. Shmilovitz, D. Kesar, A.S. |
description | A state-of-the-art, all-solid-state sub-nanosecond pulse generator is presented. The generator is characterized by three compression stages. The first stage uses a power MOSFET that initially provides current increase in the storage inductor and then breaks the current. The second stage uses a 3 kV drift step recovery diode that cuts the reverse current rapidly to create a less than 1 nanosecond rise time pulse to charge a peaking capacitor. In the last stage, a silicon-avalanche shaper is used as a fast closing switch to discharge the capacitor. A 100 ps rise time, 1.5 kV output with 250 ps FWHM to a 50 Ohm load was achieved at a high pulse repetition frequency of up to 60 kHz with low < 30 ps jitter. The optimization and characterization of this generator will be presented. |
doi_str_mv | 10.1109/PLASMA.2008.4591190 |
format | conference_proceeding |
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The generator is characterized by three compression stages. The first stage uses a power MOSFET that initially provides current increase in the storage inductor and then breaks the current. The second stage uses a 3 kV drift step recovery diode that cuts the reverse current rapidly to create a less than 1 nanosecond rise time pulse to charge a peaking capacitor. In the last stage, a silicon-avalanche shaper is used as a fast closing switch to discharge the capacitor. A 100 ps rise time, 1.5 kV output with 250 ps FWHM to a 50 Ohm load was achieved at a high pulse repetition frequency of up to 60 kHz with low < 30 ps jitter. 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The generator is characterized by three compression stages. The first stage uses a power MOSFET that initially provides current increase in the storage inductor and then breaks the current. The second stage uses a 3 kV drift step recovery diode that cuts the reverse current rapidly to create a less than 1 nanosecond rise time pulse to charge a peaking capacitor. In the last stage, a silicon-avalanche shaper is used as a fast closing switch to discharge the capacitor. A 100 ps rise time, 1.5 kV output with 250 ps FWHM to a 50 Ohm load was achieved at a high pulse repetition frequency of up to 60 kHz with low < 30 ps jitter. The optimization and characterization of this generator will be presented.</abstract><pub>IEEE</pub><doi>10.1109/PLASMA.2008.4591190</doi></addata></record> |
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subjects | Generators Optimization |
title | Optimization and characterization of a 1.5 kV, 100 sp rise time, all-solid-state pulse generator |
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