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Evolutionary system for prediction and optimization of hardware architecture performance

The design of computer architectures is a very complex problem. The multiple parameters make the number of possible combinations extremely high.Many researchers have used simulation, although it is a slow solution since evaluating a single point of the search space can take hours. In this work we pr...

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Main Authors: Castillo, P.A., Merelo, J.J., Moreto, M., Cazorla, F.J., Valero, M., Mora, A.M., Laredo, J.L.J., McKee, S.A.
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container_start_page 1941
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creator Castillo, P.A.
Merelo, J.J.
Moreto, M.
Cazorla, F.J.
Valero, M.
Mora, A.M.
Laredo, J.L.J.
McKee, S.A.
description The design of computer architectures is a very complex problem. The multiple parameters make the number of possible combinations extremely high.Many researchers have used simulation, although it is a slow solution since evaluating a single point of the search space can take hours. In this work we propose using evolutionary multilayer perceptron (MLP) to compute the performance of an architecture parameter settings. Instead of exploring the search space, simulating many configurations, our method randomly selects some architecture configurations; those are simulated to obtain their performance, and then an artificial neural network is trained to predict the remaining configurations performance. Results obtained show a high accuracy of the estimations using a simple method to select the configurations we have to simulate to optimize the MLP. In order to explore the search space, we have designed a genetic algorithm that uses the MLP as fitness function to find the niche where the best architecture configurations (those with higher performance) are located. Our models need only a small fraction of the design space, obtaining small errors and reducing required simulation by two orders of magnitude.
doi_str_mv 10.1109/CEC.2008.4631054
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fullrecord <record><control><sourceid>ieee_6IE</sourceid><recordid>TN_cdi_ieee_primary_4631054</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>4631054</ieee_id><sourcerecordid>4631054</sourcerecordid><originalsourceid>FETCH-LOGICAL-c259t-f76743a52eaaccff06b113b79db622dbfb937734418ab7b2f28c5d170c2fd7003</originalsourceid><addsrcrecordid>eNo1kEtLA0EQhMdHwCTmLniZP7BxXjs9c5QlUSHgRSG3ME8yks0usxsl_no3GvvSVH9UQTVCd5TMKSX6oVpUc0aImgvJKSnFBZppUFQwIahiHC7RmGpBC0KYvEKTf8DE9QCI0gWAWo_QZMgATUBqdYNmXfdBhhEll5SN0Xrx2ewOfWr2Jh9xd-z6UOPYZNzm4JM7AWz2Hjdtn-r0bX4PTcRbk_2XyQGb7LapD64_DKINefDWZu_CLRpFs-vC7Lyn6H25eKuei9Xr00v1uCocK3VfRJAguClZMMa5GIm0lHIL2lvJmLfRag7AT8WMBcsiU670FIhj0QMhfIru_3JTCGHT5lQPRTbnj_EfgC9aiQ</addsrcrecordid><sourcetype>Publisher</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype></control><display><type>conference_proceeding</type><title>Evolutionary system for prediction and optimization of hardware architecture performance</title><source>IEEE Electronic Library (IEL) Conference Proceedings</source><creator>Castillo, P.A. ; Merelo, J.J. ; Moreto, M. ; Cazorla, F.J. ; Valero, M. ; Mora, A.M. ; Laredo, J.L.J. ; McKee, S.A.</creator><creatorcontrib>Castillo, P.A. ; Merelo, J.J. ; Moreto, M. ; Cazorla, F.J. ; Valero, M. ; Mora, A.M. ; Laredo, J.L.J. ; McKee, S.A.</creatorcontrib><description>The design of computer architectures is a very complex problem. The multiple parameters make the number of possible combinations extremely high.Many researchers have used simulation, although it is a slow solution since evaluating a single point of the search space can take hours. In this work we propose using evolutionary multilayer perceptron (MLP) to compute the performance of an architecture parameter settings. Instead of exploring the search space, simulating many configurations, our method randomly selects some architecture configurations; those are simulated to obtain their performance, and then an artificial neural network is trained to predict the remaining configurations performance. Results obtained show a high accuracy of the estimations using a simple method to select the configurations we have to simulate to optimize the MLP. In order to explore the search space, we have designed a genetic algorithm that uses the MLP as fitness function to find the niche where the best architecture configurations (those with higher performance) are located. Our models need only a small fraction of the design space, obtaining small errors and reducing required simulation by two orders of magnitude.</description><identifier>ISSN: 1089-778X</identifier><identifier>ISBN: 1424418224</identifier><identifier>ISBN: 9781424418220</identifier><identifier>EISSN: 1941-0026</identifier><identifier>EISBN: 9781424418237</identifier><identifier>EISBN: 1424418232</identifier><identifier>DOI: 10.1109/CEC.2008.4631054</identifier><identifier>LCCN: 2007907698</identifier><language>eng</language><publisher>IEEE</publisher><subject>Artificial neural networks ; Benchmark testing ; Computational modeling ; Computer architecture ; Neurons ; Predictive models ; Training</subject><ispartof>2008 IEEE Congress on Evolutionary Computation (IEEE World Congress on Computational Intelligence), 2008, p.1941-1948</ispartof><lds50>peer_reviewed</lds50><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/4631054$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,780,784,789,790,2056,27924,54554,54795,54919,54931</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/4631054$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Castillo, P.A.</creatorcontrib><creatorcontrib>Merelo, J.J.</creatorcontrib><creatorcontrib>Moreto, M.</creatorcontrib><creatorcontrib>Cazorla, F.J.</creatorcontrib><creatorcontrib>Valero, M.</creatorcontrib><creatorcontrib>Mora, A.M.</creatorcontrib><creatorcontrib>Laredo, J.L.J.</creatorcontrib><creatorcontrib>McKee, S.A.</creatorcontrib><title>Evolutionary system for prediction and optimization of hardware architecture performance</title><title>2008 IEEE Congress on Evolutionary Computation (IEEE World Congress on Computational Intelligence)</title><addtitle>CEC</addtitle><description>The design of computer architectures is a very complex problem. The multiple parameters make the number of possible combinations extremely high.Many researchers have used simulation, although it is a slow solution since evaluating a single point of the search space can take hours. In this work we propose using evolutionary multilayer perceptron (MLP) to compute the performance of an architecture parameter settings. Instead of exploring the search space, simulating many configurations, our method randomly selects some architecture configurations; those are simulated to obtain their performance, and then an artificial neural network is trained to predict the remaining configurations performance. Results obtained show a high accuracy of the estimations using a simple method to select the configurations we have to simulate to optimize the MLP. In order to explore the search space, we have designed a genetic algorithm that uses the MLP as fitness function to find the niche where the best architecture configurations (those with higher performance) are located. Our models need only a small fraction of the design space, obtaining small errors and reducing required simulation by two orders of magnitude.</description><subject>Artificial neural networks</subject><subject>Benchmark testing</subject><subject>Computational modeling</subject><subject>Computer architecture</subject><subject>Neurons</subject><subject>Predictive models</subject><subject>Training</subject><issn>1089-778X</issn><issn>1941-0026</issn><isbn>1424418224</isbn><isbn>9781424418220</isbn><isbn>9781424418237</isbn><isbn>1424418232</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2008</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><recordid>eNo1kEtLA0EQhMdHwCTmLniZP7BxXjs9c5QlUSHgRSG3ME8yks0usxsl_no3GvvSVH9UQTVCd5TMKSX6oVpUc0aImgvJKSnFBZppUFQwIahiHC7RmGpBC0KYvEKTf8DE9QCI0gWAWo_QZMgATUBqdYNmXfdBhhEll5SN0Xrx2ewOfWr2Jh9xd-z6UOPYZNzm4JM7AWz2Hjdtn-r0bX4PTcRbk_2XyQGb7LapD64_DKINefDWZu_CLRpFs-vC7Lyn6H25eKuei9Xr00v1uCocK3VfRJAguClZMMa5GIm0lHIL2lvJmLfRag7AT8WMBcsiU670FIhj0QMhfIru_3JTCGHT5lQPRTbnj_EfgC9aiQ</recordid><startdate>200806</startdate><enddate>200806</enddate><creator>Castillo, P.A.</creator><creator>Merelo, J.J.</creator><creator>Moreto, M.</creator><creator>Cazorla, F.J.</creator><creator>Valero, M.</creator><creator>Mora, A.M.</creator><creator>Laredo, J.L.J.</creator><creator>McKee, S.A.</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>200806</creationdate><title>Evolutionary system for prediction and optimization of hardware architecture performance</title><author>Castillo, P.A. ; Merelo, J.J. ; Moreto, M. ; Cazorla, F.J. ; Valero, M. ; Mora, A.M. ; Laredo, J.L.J. ; McKee, S.A.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c259t-f76743a52eaaccff06b113b79db622dbfb937734418ab7b2f28c5d170c2fd7003</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2008</creationdate><topic>Artificial neural networks</topic><topic>Benchmark testing</topic><topic>Computational modeling</topic><topic>Computer architecture</topic><topic>Neurons</topic><topic>Predictive models</topic><topic>Training</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Castillo, P.A.</creatorcontrib><creatorcontrib>Merelo, J.J.</creatorcontrib><creatorcontrib>Moreto, M.</creatorcontrib><creatorcontrib>Cazorla, F.J.</creatorcontrib><creatorcontrib>Valero, M.</creatorcontrib><creatorcontrib>Mora, A.M.</creatorcontrib><creatorcontrib>Laredo, J.L.J.</creatorcontrib><creatorcontrib>McKee, S.A.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Castillo, P.A.</au><au>Merelo, J.J.</au><au>Moreto, M.</au><au>Cazorla, F.J.</au><au>Valero, M.</au><au>Mora, A.M.</au><au>Laredo, J.L.J.</au><au>McKee, S.A.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Evolutionary system for prediction and optimization of hardware architecture performance</atitle><btitle>2008 IEEE Congress on Evolutionary Computation (IEEE World Congress on Computational Intelligence)</btitle><stitle>CEC</stitle><date>2008-06</date><risdate>2008</risdate><spage>1941</spage><epage>1948</epage><pages>1941-1948</pages><issn>1089-778X</issn><eissn>1941-0026</eissn><isbn>1424418224</isbn><isbn>9781424418220</isbn><eisbn>9781424418237</eisbn><eisbn>1424418232</eisbn><abstract>The design of computer architectures is a very complex problem. The multiple parameters make the number of possible combinations extremely high.Many researchers have used simulation, although it is a slow solution since evaluating a single point of the search space can take hours. In this work we propose using evolutionary multilayer perceptron (MLP) to compute the performance of an architecture parameter settings. Instead of exploring the search space, simulating many configurations, our method randomly selects some architecture configurations; those are simulated to obtain their performance, and then an artificial neural network is trained to predict the remaining configurations performance. Results obtained show a high accuracy of the estimations using a simple method to select the configurations we have to simulate to optimize the MLP. In order to explore the search space, we have designed a genetic algorithm that uses the MLP as fitness function to find the niche where the best architecture configurations (those with higher performance) are located. Our models need only a small fraction of the design space, obtaining small errors and reducing required simulation by two orders of magnitude.</abstract><pub>IEEE</pub><doi>10.1109/CEC.2008.4631054</doi><tpages>8</tpages><oa>free_for_read</oa></addata></record>
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issn 1089-778X
1941-0026
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source IEEE Electronic Library (IEL) Conference Proceedings
subjects Artificial neural networks
Benchmark testing
Computational modeling
Computer architecture
Neurons
Predictive models
Training
title Evolutionary system for prediction and optimization of hardware architecture performance
url http://sfxeu10.hosted.exlibrisgroup.com/loughborough?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-12T20%3A40%3A32IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-ieee_6IE&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=Evolutionary%20system%20for%20prediction%20and%20optimization%20of%20hardware%20architecture%20performance&rft.btitle=2008%20IEEE%20Congress%20on%20Evolutionary%20Computation%20(IEEE%20World%20Congress%20on%20Computational%20Intelligence)&rft.au=Castillo,%20P.A.&rft.date=2008-06&rft.spage=1941&rft.epage=1948&rft.pages=1941-1948&rft.issn=1089-778X&rft.eissn=1941-0026&rft.isbn=1424418224&rft.isbn_list=9781424418220&rft_id=info:doi/10.1109/CEC.2008.4631054&rft.eisbn=9781424418237&rft.eisbn_list=1424418232&rft_dat=%3Cieee_6IE%3E4631054%3C/ieee_6IE%3E%3Cgrp_id%3Ecdi_FETCH-LOGICAL-c259t-f76743a52eaaccff06b113b79db622dbfb937734418ab7b2f28c5d170c2fd7003%3C/grp_id%3E%3Coa%3E%3C/oa%3E%3Curl%3E%3C/url%3E&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=4631054&rfr_iscdi=true