CMOS 0.18-μm integrated power amplifier for UWB systems

A two-stage power amplifier for UWB systems transmitter was designed and simulated for implementing in standard 0.18-mum CMOS technology. Using cascode scheme and original biasing architecture allows to decrease a number of on-chip inductors and capacitors and simplify amplifier schematic. Amplifier...

Full description

Saved in:
Bibliographic Details
Main Authors: Makarov, D.G., Krizhanovskii, V.V., Chang Shu, Krizhanovskii, V.G.
Format: Conference Proceeding
Language:English
Subjects:
Bandwidth
Capacitors
cascode
Circuits
CMOS
CMOS technology
Frequency
Inductors
Parasitic capacitance
power amplifier
Power amplifiers
Ultra wideband technology
UWB
Voltage
Online Access:Request full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:A two-stage power amplifier for UWB systems transmitter was designed and simulated for implementing in standard 0.18-mum CMOS technology. Using cascode scheme and original biasing architecture allows to decrease a number of on-chip inductors and capacitors and simplify amplifier schematic. Amplifier can deliver 30 mW of output power with 48% efficiency in 4-5 GHz bandwidth with 1.8 supply voltage.
DOI:10.1109/UWBUS.2008.4669390