VLSI Hamming neural net showing digital decoding

The electrical performance in PSpice for a VLSI Hamming neural net in CMOS 2-micron technology is presented. It features analog parallel processing and digital decoding, keeping the low circuit-interconnection complexity of early schemes.< >

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Bibliographic Details
Main Authors: Gomez-Castaneda, F., Moreno-Cadenas, J.A.
Format: Conference Proceeding
Language:English
Subjects:
Cities and towns
CMOS analog integrated circuits
CMOS digital integrated circuits
CMOS process
CMOS technology
Decoding
Integrated circuit interconnections
Neural networks
Parallel processing
Very large scale integration
Online Access:Request full text
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Description
Summary:The electrical performance in PSpice for a VLSI Hamming neural net in CMOS 2-micron technology is presented. It features analog parallel processing and digital decoding, keeping the low circuit-interconnection complexity of early schemes.< >
DOI:10.1109/NNSP.1993.471848