A high-performance & low-power unified 4×4 / 8×8 transform architecture for the H.264/AVC Codec

In this paper, we propose a high performance and low power unified 8 times 8 transform and 4 times 4 transform architecture for the H.264/AVC codec. The proposed architecture integrates 4 times 4 transforms and 8 times 8 transforms in the common architecture with reusability, which reduces complexit...

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Bibliographic Details
Main Authors: Wonjoon Choi, Jonghyuk Park, Seongsoo Lee
Format: Conference Proceeding
Language:English
Subjects:
Automatic voltage control
Clocks
Codecs
Frequency
H.264/AVC
High definition video
high profile
IEC standards
Parallel processing
Scalability
transform
Transform coding
Video compression
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Summary:In this paper, we propose a high performance and low power unified 8 times 8 transform and 4 times 4 transform architecture for the H.264/AVC codec. The proposed architecture integrates 4 times 4 transforms and 8 times 8 transforms in the common architecture with reusability, which reduces complexity significantly. Also, we simplify the transform architecture and data flow to get the high performance merit without decomposition. Furthermore 8times8 transforms can be processed in 5 cycles by parallel processing. This way the transform architecture can process full-HD (1080p) video images at 27 MHz clock frequency, therefore we get the low power merit. As a result, the proposed architecture trades-off high performance and low power against chip area.
ISSN:2151-2191
2151-2205
DOI:10.1109/IVCNZ.2008.4762099