Band Pass Filter Design and Optimization on High-Resistivity Silicon for 5GHz RF Front End Receiver

• Main Authors: Zhou Jinchang, Xiao Xianghua, Liu Shiguo, Nagaya, K., Tsuchiya, Y., Mano, Y., Khoo Yee Mong, Li Hongyu
• Format: Conference Proceeding
• Language: English
• Subjects: Band pass filters; Ceramics; Design optimization; High-K gate dielectrics; Mobile communication; Radio frequency; Silicon; Surface-mount technology; Temperature; Wireless communication
• DOI: 10.1109/EPTC.2008.4763562

Low-cost and compact size is endlessly requested by new wireless and mobile communication systems. These requirements are critical for some specific application such as bandpass filter(BPF). Most of today embedded filters in SIP are made on low temperature co-fired ceramics (LTCC) technology, which eliminates Surface Mount Technology (SMT) and reduces the size of the filter. While LTCC filter can reduce the lateral size due to relatively high dielectric constant, it may not represent the most economical solution. Due to the increasing complexity and miniaturization of today's wireless products, the radio subsystems are being driven to very aggressive trends in advanced silicon processes for its process maturity, miniaturization. In this paper, a flowchart for RF BPFs design on silicon wafer from single inductor, capacitor to BPF optimization has been presented and proved. Two test vehicles for 5 GHz Wifi BPF are fabicated and characterized on six high-resistivity silicon (HR) wafers. Wide bandpass filter size at 0.9 mm times 1.4 mm and narrow bandpass filter size at 1.2 mm times 1.66 mm are realized. The preliminary measurement results are shown in the following.