Energy-Band-Engineered Unified-RAM (URAM) Cell on Buried \hbox\hbox Substrate for Multifunctioning Flash Memory and 1T-DRAM

• Published in: IEEE transactions on electron devices 2009-04, Vol.56 (4), p.641-647
• Main Authors: Han, Jin-Woo, Ryu, Seong-Wan, Kim, Chung-Jin, Choi, Sung-Jin, Kim, Sungho, Ahn, Jae-Hyuk, Kim, Dong-Hyun, Choi, Kyu Jin, Cho, Byung Jin, Kim, Jin-Soo, Kim, Kwang Hee, Lee, Gi-Sung, Oh, Jae-Sub, Song, Myeong-Ho, Park, Yun Chang, Kim, Jeoung Woo, Choi, Yang-Kyu
• Format: Article
• Language: English
• Subjects: Band offset; body-tied FinFET; capacitorless 1T-DRAM; Electrical engineering; FinFETs; Logic gates; Nonvolatile memory; nonvolatile memory (NVM); SiC; Silicon; SONOS; Substrates; Threshold voltage; unified-RAM (URAM)
• ISSN: 0018-9383; 1557-9646
• DOI: 10.1109/TED.2009.2014197

A band-offset-based unified-RAM (URAM) cell fabricated on a Si/Si 1-y C y substrate is presented for the fusion of a nonvolatile memory (NVM) and a capacitorless 1T-DRAM. An oxide/nitride/oxide (O/N/O) gate dielectric and a floating-body are combined in a FinFET structure to perform URAM operation in a single transistor. The O/N/O layer is utilized as a charge trap layer for NVM, and the floating-body is used as an excess hole storage node for capacitorless 1T-DRAM. The introduction of a pseudomorphic SiC-based heteroepitaxial layer into the Si substrate provides band offset in a valence band. The FinFET fabricated on the energy-band-engineered Si 1-y C y substrate allows hole accumulation in the channel for 1T-DRAM. The band-engineered URAM yields a cost-effective process that is compatible with a conventional body-tied FinFET SONOS. The fabricated URAM shows highly reliable NVM and high-speed 1T-DRAM operations in a single memory cell.