Reducing cost of frequency binning: An effective and efficient approach

With increased circuit complexity, frequency binning of parts has become more difficult. Traditional techniques used for binning have their limitations in terms of quality and cost of binning. In the absence of a dependable approach, the economic advantage of binning may be defeated due to a high te...

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Bibliographic Details
Main Authors: Mittal, D., Agrawal, D., Kukreja, H., Aggarwal, R.
Format: Conference Proceeding
Language:English
Subjects:
Automatic test pattern generation
Circuit faults
Controllability
Costs
Delay
Fault detection
Frequency
Frequency binning
Functional test patterns
Integrated circuit testing
Observability
Scan Testing
Timing
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Summary:With increased circuit complexity, frequency binning of parts has become more difficult. Traditional techniques used for binning have their limitations in terms of quality and cost of binning. In the absence of a dependable approach, the economic advantage of binning may be defeated due to a high test cost for achieving reliable quality. This paper illustrates a dependable approach for creating ATPG patterns for reliable frequency binning at a relatively low test cost. The paper includes case studies of using this approach on an industry IC.
DOI:10.1109/SOCDC.2008.4815650