An efficient hardware design of an optimal nonstationary filtering system

The development of a multi-cycle hardware design of a time-varying (TV) filtering system, suitable for real-time implementation on an integrated chip is outlined in this work. Based on results of time-frequency (TF) analysis and the instantaneous frequency (IF) estimation, the proposed design enable...

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Bibliographic Details
Main Authors: Jovanovski, S., Ivanovic, V.N.
Format: Conference Proceeding
Language:English
Subjects:
Field programmable gate arrays
Filtering
Frequency estimation
Hardware
Hardware design
Instantaneous frequency estimation
Real time systems
Signal analysis
Signal design
Time frequency analysis
Time varying systems
Time-varying filtering
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Summary:The development of a multi-cycle hardware design of a time-varying (TV) filtering system, suitable for real-time implementation on an integrated chip is outlined in this work. Based on results of time-frequency (TF) analysis and the instantaneous frequency (IF) estimation, the proposed design enables multiple detection of the local filter's region of support (FRS) in the observed time-instant, resulting in the efficient filtering of multicomponent FM signals. The proposed design optimizes critical design performances (such as hardware complexity, energy consumption and hardware cost), making it a suitable system for real-time implementation on a chip. The design has been verified by an FPGA (field-programmable gate array) circuit design.
ISSN:1520-6149
2379-190X
DOI:10.1109/ICASSP.2009.4959647