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An efficient hardware design of an optimal nonstationary filtering system

The development of a multi-cycle hardware design of a time-varying (TV) filtering system, suitable for real-time implementation on an integrated chip is outlined in this work. Based on results of time-frequency (TF) analysis and the instantaneous frequency (IF) estimation, the proposed design enable...

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Main Authors: Jovanovski, S., Ivanovic, V.N.
Format: Conference Proceeding
Language:English
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Ivanovic, V.N.
description The development of a multi-cycle hardware design of a time-varying (TV) filtering system, suitable for real-time implementation on an integrated chip is outlined in this work. Based on results of time-frequency (TF) analysis and the instantaneous frequency (IF) estimation, the proposed design enables multiple detection of the local filter's region of support (FRS) in the observed time-instant, resulting in the efficient filtering of multicomponent FM signals. The proposed design optimizes critical design performances (such as hardware complexity, energy consumption and hardware cost), making it a suitable system for real-time implementation on a chip. The design has been verified by an FPGA (field-programmable gate array) circuit design.
doi_str_mv 10.1109/ICASSP.2009.4959647
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ispartof 2009 IEEE International Conference on Acoustics, Speech and Signal Processing, 2009, p.569-572
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2379-190X
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source IEEE Xplore All Conference Series
subjects Field programmable gate arrays
Filtering
Frequency estimation
Hardware
Hardware design
Instantaneous frequency estimation
Real time systems
Signal analysis
Signal design
Time frequency analysis
Time varying systems
Time-varying filtering
title An efficient hardware design of an optimal nonstationary filtering system
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