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Thermal analysis of vertically integrated circuits

In this paper, a thermal analysis of Vertically Integrated Circuits (VIC) is presented for the first time. Based on a 1-D model, temperature differences in VICs of less than 10/spl deg/C are evaluated for most practical applications. Detailed 3-D investigations show that self-heating of MOSFETs in t...

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Bibliographic Details
Main Authors: Kleiner, M.B., Kuhn, S.A., Ramm, P., Weber, W.
Format: Conference Proceeding
Language:English
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Summary:In this paper, a thermal analysis of Vertically Integrated Circuits (VIC) is presented for the first time. Based on a 1-D model, temperature differences in VICs of less than 10/spl deg/C are evaluated for most practical applications. Detailed 3-D investigations show that self-heating of MOSFETs in the upper chip-layers of a VIC is more pronounced than in bulk CMOS and that it strongly depends on the thickness of the silicon remaining in the chip-layer. In addition, thermal coupling between adjacent transistors is observed to be much more marked.
ISSN:0163-1918
2156-017X
DOI:10.1109/IEDM.1995.499244