Three-tier PoP configuration utilizing flip chip Fan-in PoP bottom package

The increasing demand for functionality and performance in mobile handsets has driven the requirement for separate modem and application processors with requisite memory. PoP has helped reduce the footprint of each processor and memory package combination on the PCB. Stacking the processors and memo...

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Main Authors: Carson, F., Ishibashi, K., Yeong Cheol Kim
Format: Conference Proceeding
Language:English
Subjects:
Electronics packaging
Flip chip
Handheld computers
Logic devices
Mobile handsets
Modems
Stacking
Temperature
Testing
Vehicles
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creator Carson, F.
Ishibashi, K.
Yeong Cheol Kim
description The increasing demand for functionality and performance in mobile handsets has driven the requirement for separate modem and application processors with requisite memory. PoP has helped reduce the footprint of each processor and memory package combination on the PCB. Stacking the processors and memory in a single three-tier PoP configuration would further reduce the footprint. This paper details the development of such a three-tier PoP configuration, utilizing Fan-in PoP technology for the bottom PoP. The developed three-tier PoP test vehicle successfully exhibited good surface mount yield and excellent board level drop test and temperature cycle performance.
doi_str_mv 10.1109/ECTC.2009.5074033
format conference_proceeding
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ispartof 2009 59th Electronic Components and Technology Conference, 2009, p.313-318
issn 0569-5503
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language eng
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source IEEE Xplore All Conference Series
subjects Electronics packaging
Flip chip
Handheld computers
Logic devices
Mobile handsets
Modems
Stacking
Temperature
Testing
Vehicles
title Three-tier PoP configuration utilizing flip chip Fan-in PoP bottom package
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