3D packaging with through ilicon via (TSV) for electrical and fluidic interconnections

In this paper a liquid cooling solution has been reported for 3-D package in PoP format. The high heat dissipating chip is mounted on a silicon carrier, which has copper through-silicon via for electrical interconnection and through-silicon hollow via for fluidic circulation. Heat enhancement struct...

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Bibliographic Details
Main Authors: Khan, N., Hong Yu, Tan Siow Pin, Soon Wee Ho, Nandar Su, Wai Yin Hnin, Kripesh, V., Pinjala, Lau, J.H., Toh Kok Chuan
Format: Conference Proceeding
Language:English
Subjects:
Heat transfer
Integrated circuit interconnections
Liquid cooling
Semiconductor device packaging
Silicon
Space heating
Stacking
Thermal conductivity
Through-silicon vias
Wafer scale integration
Online Access:Request full text
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Description
Summary:In this paper a liquid cooling solution has been reported for 3-D package in PoP format. The high heat dissipating chip is mounted on a silicon carrier, which has copper through-silicon via for electrical interconnection and through-silicon hollow via for fluidic circulation. Heat enhancement structures have been embedded in the chip carrier. Cooling liquid, de-ionized water is circulated through the chip carrier and heat from the chip is extracted. The fluidic channels are isolated from electrical traces using hermetic sealing. The research work has demonstrated 100 W of heat dissipation from one stack and total of 200 W from two stacks of the package. The fluidic interconnections and sealing techniques have been discussed.
ISSN:0569-5503
2377-5726
DOI:10.1109/ECTC.2009.5074157