Package routability- and IR-drop-aware finger/pad assignment in chip-package co-design

Due to increasing complexity of design interactions between the chip, package and PCB, it is essential to consider them at the same time. Specifically the finger/pad locations affect the performance of the chip and the package significantly. In this paper, we have developed techniques in chip-packag...

Full description

Saved in:
Bibliographic Details
Main Authors: Chao-Hung Lu, Hung-Ming Chen, Liu, C.-N.J., Wen-Yu Shih
Format: Conference Proceeding
Language:English
Subjects:
Chaos
Chip scale packaging
Circuit testing
Design engineering
Electronics packaging
Fingers
Flowcharts
Noise reduction
Optimization methods
Routing
Online Access:Request full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:Due to increasing complexity of design interactions between the chip, package and PCB, it is essential to consider them at the same time. Specifically the finger/pad locations affect the performance of the chip and the package significantly. In this paper, we have developed techniques in chip-package codesign to decide the locations of fingers/pads for package routability and signal integrity concerns in chip core design. Our finger/pad assignment is a two-step method: first we optimize the wire congestion problem in package routing, and then we try to minimize the IR-drop violation with finger/pad solution refinement. The experimental results are encouraging. Compared with the randomly optimized methods, our approaches reduce in average 42% and 68% of the maximum density in package and 10.61% of IR-drop for test circuits.
ISSN:1530-1591
1558-1101
DOI:10.1109/DATE.2009.5090780