Implementation and prototyping of a complex multi-project system-on-a-chip

• Main Authors: Chun-Ming Huang, Chien-Ming Wu, Chih-Chyau Yang, Wei-De Chien, Shih-Lun Chen, Chi-Shi Chen, Jiann-Jenn Wang, Chin-Long Wey
• Format: Conference Proceeding
• Language: English
• Subjects: CMOS logic circuits; CMOS process; CMOS technology; Costs; Hardware; Prototypes; Silicon; Software prototyping; System-on-a-chip; Virtual prototyping
• ISSN: 0271-4302; 2158-1525
• DOI: 10.1109/ISCAS.2009.5118264

A silicon prototyping methodology is presented for Multi-Project System-on-a-Chip (MP-SoC) implementation. A multi-projects platform was created for integrating heterogeneous SoC projects into a single chip. The total silicon prototyping cost of these projects can be greatly reduced by sharing a common platform. To demonstrate the effectiveness of the proposed methodology, a MP-SoC chip was implemented with eleven SoC projects sharing the common platform. The total silicon area is about 37.97 mm 2 in the TSMC 0.13 um CMOS generic logic process technology. Compared with the total chip area 129.39 mm 2 by implementing these projects separately, the results show that there are 91.42 mm 2 silicon areas reduced by the MP-SoC platform. In order to verify MP-SoC through silicon prototyping, a system modeling and hardware/ software co-design virtual platform were implemented. A configurable SoC prototyping system, namely CONCORD, is also created as a verification platform for emulating the hardware of MP-SoC before chip being taped out. The CONCORD system provides higher connection flexibility, modularization, and architecture consistence than conventional FPGA systems.