A 71-76 GHz chip set for wireless communication in 65-nm CMOS technology

This paper presents a chip set of RF front-end circuits using 65-nm CMOS technology. The chip set includes a LNA, a down-conversion mixer, an up-conversion mixer and a medium power amplifier. The LNA has the 3-dB bandwidth from 68 to 75 GHz with a peak value of 17 dB. The down-conversion mixer has a...

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Bibliographic Details
Main Authors: Kuo, Jhe-Jia, Lin, Wei-Heng, Kuo, Che-Chun, Tseng, Jeffrey Ronald, Tsai, Zuo-Min, Lin, Kun-You, Wang, Huei
Format: Conference Proceeding
Language:English
Subjects:
Circuit noise
Circuit synthesis
CMOS
CMOS technology
Gain
low noise amplifier
Low-noise amplifiers
mixer
Noise figure
power amplifier
Power amplifiers
Radio frequency
Radiofrequency amplifiers
Wireless communication
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Summary:This paper presents a chip set of RF front-end circuits using 65-nm CMOS technology. The chip set includes a LNA, a down-conversion mixer, an up-conversion mixer and a medium power amplifier. The LNA has the 3-dB bandwidth from 68 to 75 GHz with a peak value of 17 dB. The down-conversion mixer has a conversion loss of better than −5 dB from 53 to 73 GHz at 4 dBm LO power. The up-conversion mixer has a conversion loss better than −5 dB from 53 to 75 GHz at 6 dBm LO power. The medium power amplifier delivers 5 dBm P 1dB and 6.7 dBm P sat at 71 GHz. These results show the potential of the 65-nm CMOS technology in high frequency circuit design.
ISSN:0149-645X
2576-7216
DOI:10.1109/MWSYM.2009.5165664