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A low cost MCM-D process for flip chip and wirebonding applications
Multi-chip modules using deposited dielectric materials (MCM-D) have been produced at IBM Microelectronics Packaging Facility for over a decade. To take full advantage of this package, IBM uses flip chip technology to minimize the required substrate and silicon active area. The terminal or bonding m...
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Main Authors: | , , |
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Format: | Conference Proceeding |
Language: | English |
Subjects: | |
Online Access: | Request full text |
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Summary: | Multi-chip modules using deposited dielectric materials (MCM-D) have been produced at IBM Microelectronics Packaging Facility for over a decade. To take full advantage of this package, IBM uses flip chip technology to minimize the required substrate and silicon active area. The terminal or bonding metals for chip to substrate interconnection have been deposited by a variety of methods including electroplating and electroless plating combinations, and recently, stencil lift-off (L/O) of evaporated film. Here, the Cr/Cu/Ni/Au metallurgy was deposited not only on the interconnecting pad areas, but also on the redistribution lines. A selective deposition process was developed to eliminate the metal on the lines. Two terminal metallurgies were evaluated by this selective process, namely Cr/Cu/Ni/Au and Cr/Cu/Co/Au. This paper will cover interconnection aspects with respect to material/solder interaction of the IBM Controlled Collapse Chip Connection (C4) process with 97 Pb/3 Sn solder and wire bonding as practiced on terminal metal pads fabricated by a selective deposition process. Reliability evaluation of this new process and Co metallurgy will also be discussed. |
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ISSN: | 0569-5503 |
DOI: | 10.1109/ECTC.1995.517825 |