A scalable solution to n-bit parity via artificial development

The design of electronic circuits with model-free heuristics like evolutionary algorithms is an attractive concept and field of research. Although successful to a point, evolution of circuits that are bigger than a 3-bit multiplier is hindered by the scalability problem. Modelling the biological dev...

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Bibliographic Details
Main Authors: Kuyucu, T., Trefzer, M.A., Miller, J.F., Tyrrell, A.M.
Format: Conference Proceeding
Language:English
Subjects:
Algorithm design and analysis
Biological system modeling
Circuit synthesis
Electronic circuits
Evolution (biology)
Evolutionary computation
Hardware
Organisms
Pattern formation
Scalability
Online Access:Request full text
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Summary:The design of electronic circuits with model-free heuristics like evolutionary algorithms is an attractive concept and field of research. Although successful to a point, evolution of circuits that are bigger than a 3-bit multiplier is hindered by the scalability problem. Modelling the biological development as an artificial genotype-phenotype mapping mechanism has been shown to improve scalability on some simple circuit problems and pattern formations. As a candidate solution to the scalability issue, an artificial developmental system is presented. The presented artificial developmental system is shown to develop a scalable parity circuit, which could be infinitely developed to build a growing parity circuit, hence, represents a general, scalable solution to n-bit parity. The result obtained further supports the artificial developmental system as a good candidate solution to the scalability problem in evolvable hardware.
DOI:10.1109/RME.2009.5201348