Photonic integration in a commercial scaled bulk-CMOS process

We demonstrate the first photonic chip designed for a commercial bulk CMOS process (65 nm-node) using standard process layers combined with post-processing, enabling dense photonic integration with high-performance microprocessor electronics.

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Bibliographic Details
Main Authors: Orcutt, J.S., Khilo, A., Popovic, M.A., Holzwarth, C.W., Li, H., Sun, J., Moss, B., Dahlem, M.S., Ippen, E.P., Hoyt, J.L., Stojanovic, V., Kartner, F.X., Smith, H.I., Ram, R.J.
Format: Conference Proceeding
Language:English
Subjects:
add/drop filter
CMOS
CMOS process
Integrated circuit interconnections
Microprocessors
microring resonator
Optical filters
Optical losses
Optical resonators
Optical waveguides
Photonic integrated circuits
Silicon
Silicon photonics
Testing
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Description
Summary:We demonstrate the first photonic chip designed for a commercial bulk CMOS process (65 nm-node) using standard process layers combined with post-processing, enabling dense photonic integration with high-performance microprocessor electronics.
ISSN:2155-8507
DOI:10.1109/PS.2009.5307769