Hardware Implementation of Lossless Adaptive and Scalable Hyperspectral Data Compression for Space

• Main Authors: Aranki, N., Keymeulen, D., Bakhshi, A., Klimesh, M.
• Format: Conference Proceeding
• Language: English
• Subjects: Adaptive filters; Data compression; Data mining; Downlink; Field programmable gate arrays; FPGA implementation; Hardware; hyperspectral data; Hyperspectral imaging; Instruments; lossless compression; NASA; Object recognition
• DOI: 10.1109/AHS.2009.66

Efficient on-board lossless hyperspectral data compression reduces data volume in order to meet NASA and DoD limited downlink capabilities. The technique also improves signature extraction, object recognition and feature classification capabilities by providing exact reconstructed data on constrained downlink resources. At JPL a novel, adaptive and predictive technique for lossless compression of hyperspectral data was recently developed. This technique uses an adaptive filtering method and achieves a combination of low complexity and compression effectiveness that far exceeds state-of-the-art techniques currently in use. The JPL-developed `Fast Lossless' algorithm requires no training data or other specific information about the nature of the spectral bands for a fixed instrument dynamic range. It is of low computational complexity and thus well-suited for implementation in hardware. It was modified for pushbroom instruments and makes it practical for flight implementations. A prototype of the compressor (and decompressor) of the algorithm is available in software, but this implementation may not meet speed and real-time requirements of some space applications. Hardware acceleration provides performance improvements of 10times-100times vs. the software implementation (about 1M samples/sec on a Pentium IV machine). This paper describes a hardware implementation of the `modified fast lossless' compression algorithm for pushbroom instruments on a field programmable gate array (FPGA). The FPGA implementation targets the current state-of-the-art FPGAs (Xilinx Virtex IV and V families) and compresses one sample every clock cycle to provide a fast and practical real-time solution for space applications.