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A low-phase-noise injection-locked differential ring-VCO with half-integral subharmonic locking in 0.18 µm CMOS
Design and implementation of a CMOS differential ring-VCO that locks at half-integral (1.5, 2.5, 3.5, hellip) as well as integral (1, 2, 3, hellip) multiples of the injected reference frequency f ref are presented. The advantage of half-integral subharmonic locking is that, for a given VCO output fr...
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Main Authors: | , , , |
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Format: | Conference Proceeding |
Language: | English |
Subjects: | |
Online Access: | Request full text |
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Summary: | Design and implementation of a CMOS differential ring-VCO that locks at half-integral (1.5, 2.5, 3.5, hellip) as well as integral (1, 2, 3, hellip) multiples of the injected reference frequency f ref are presented. The advantage of half-integral subharmonic locking is that, for a given VCO output frequency step, the output phase noise can be lowered than when using integral subharmonic locking because of the higher (2x) reference frequency. For example, the 1-MHz-offset phase noise at a VCO output frequency of 1.5 GHz was -136 dBc/Hz when locked to an integral subharmonic of f ref = 0.5 GHz, whereas it was as low as -139 dBc/Hz when locked to a half-integral subharmonic of f ref = 1.0 GHz. The ring-VCO was fabricated with a 0.18 mum CMOS process. An explanation is given as to why it locks to half-integral subharmonics and how such an oscillator could be designed. Half-integral or, more generally, nonintegral subharmonic locking could make an effective means to reduce the phase noise of high-resolution injection-locked VCOs. |
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ISSN: | 1930-8833 2643-1319 |
DOI: | 10.1109/ESSCIRC.2009.5325965 |