Soft Error Tolerant Asynchronous Circuits Based on Dual Redundant Four State Logic

The continuing downscaling of integrated circuits makes modern devices more susceptible to soft errors. This paper investigates the possibility of using Four-State Logic (FSL) to improve the fault tolerance of digital circuits. FSL is a possible implementation of asynchronous Quasi Delay Insensitive...

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Bibliographic Details
Main Authors: Friesenbichler, W., Steininger, A.
Format: Conference Proceeding
Language:English
Subjects:
Asynchronous circuits
Asynchronous Logic
Circuit faults
Delay
Digital circuits
Dual-Redundancy
Encoding
Fault tolerance
Four-State Logic
Logic circuits
Logic devices
Protocols
Soft Error
Transient analysis
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Summary:The continuing downscaling of integrated circuits makes modern devices more susceptible to soft errors. This paper investigates the possibility of using Four-State Logic (FSL) to improve the fault tolerance of digital circuits. FSL is a possible implementation of asynchronous Quasi Delay Insensitive (QDI) logic using a more efficient encoding and handshake protocol. The behavior of asynchronous circuits designed with FSL when subjected to transient faults is analyzed. We present methods based on dual redundancy that allow to detect as well as correct soft errors autonomously. The concept is demonstrated by fault injection experiments.
DOI:10.1109/DSD.2009.142