Enhanced Scaling-Free CORDIC

Coordinate Rotation DIgital Computer (CORDIC) rotator is a well known and widely used algorithm within computers due to its way of carrying out some calculations such as trigonometric functions, among others. A scale factor compensation inherent to the CORDIC algorithm becomes an important drawback...

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Bibliographic Details
Published in:IEEE transactions on circuits and systems. I, Regular papers Regular papers, 2010-07, Vol.57 (7), p.1654-1662
Main Authors: Jaime, Francisco J, Sanchez, Miguel A, Hormigo, Javier, Villalba, Julio, Zapata, Emilio L
Format: Article
Language:English
Subjects:
Algorithms
Booth recoding
Circuits
Compensation
Computer architecture
Convergence
convergence range
Coordinate Rotation DIgital Computer (CORDIC)
Delay
Digital computers
Digital signal processing
Energy consumption
Hardware
Iterative algorithms
Mathematical analysis
Mathematical models
Power consumption
Power generation economics
Reduction
scaling-free
Signal processing algorithms
Testing
vector rotation
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Summary:Coordinate Rotation DIgital Computer (CORDIC) rotator is a well known and widely used algorithm within computers due to its way of carrying out some calculations such as trigonometric functions, among others. A scale factor compensation inherent to the CORDIC algorithm becomes an important drawback when trying to improve its benefits, although some authors have come up with a new scaling-free version, which has been successfully implemented within wireless applications. However, this new CORDIC can still be significantly improved by modifying some of its parts, therefore, this paper shows an enhanced version of the scaling-free CORDIC. These new enhancements have been implemented and tested, obtaining some new architectures which are able to reach a 35% lower latency and a 36% reduction in area and power consumption compared to the original scaling-free architecture.
ISSN:1549-8328
1558-0806
DOI:10.1109/TCSI.2009.2037391