High throughput scalable Motion Compensation architecture for H.264/SVC video coding standard

The spatial scalability is one of the main features in scalable video coding and it provides an efficient video representation with different spatial resolutions. This paper presents a high throughput scalable motion compensation architecture compliant with the H.264/SVC standard. The designed archi...

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Bibliographic Details
Main Authors: Silva, T., Zatt, B., Susin, A., Bampi, S., Agostini, L.
Format: Conference Proceeding
Language:English
Subjects:
Automatic voltage control
Computer architecture
Decoding
Integrated circuit synthesis
Motion compensation
Scalability
Spatial resolution
Static VAr compensators
Throughput
Video coding
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Summary:The spatial scalability is one of the main features in scalable video coding and it provides an efficient video representation with different spatial resolutions. This paper presents a high throughput scalable motion compensation architecture compliant with the H.264/SVC standard. The designed architecture is able to decode two dyadic spatial layers, it includes the Motion Compensation in these two layers and the inter-layer motion prediction. The designed architecture was synthesized to Xilinx Virtex-4 FPGA. The synthesis results show that the architecture used 23,504 LUTs of the target device and it reached the necessary throughput to decode 4VGA videos in real time.
DOI:10.1109/ICECS.2009.5410935