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This paper addresses a transistor level design for manufacturing methodology. Design efforts are devoted to robustness against process variations. Temperature and voltage tolerances should also be tackled for mass production. A structured design methodology contemplating issues like intuitive design...

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Bibliographic Details
Main Authors: Fernandez-Garcia, N.A., Brea, V.M., Cabello, D.
Format: Conference Proceeding
Language:English
Subjects:
Appropriate technology
Cellular networks
Cellular neural networks
Circuit synthesis
CMOS technology
Computer science
Design methodology
Microelectronics
Pulp manufacturing
Robustness
Online Access:Request full text
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Summary:This paper addresses a transistor level design for manufacturing methodology. Design efforts are devoted to robustness against process variations. Temperature and voltage tolerances should also be tackled for mass production. A structured design methodology contemplating issues like intuitive design and Monte-Carlo simulations is proposed. As an illustrative example, the methodology is applied to the design of a cellular nonlinear network cell in UMC 130 nm CMOS technology.
ISSN:2159-1660
DOI:10.1109/ICM.2009.5418678