A new and simple experimental approach to characterizing the carrier transport and reliability of strained CMOS devices in the quasi-ballistic regime

• Main Authors: Hsieh, E.R., Chung, S.S., Liu, P.W., Chiang, W.T., Tsai, C.H., Teng, W.Y., Li, C.I., Kuo, T.F., Wang, Y.R., Yang, C.L., Tsai, C.T., Ma, G.H.
• Format: Conference Proceeding
• Language: English
• Subjects: Capacitive sensors; Condition monitoring; Degradation; MOSFET circuits; Particle scattering; Quantum mechanics; Stress; Temperature dependence; Temperature measurement; Time division multiplexing
• ISSN: 0163-1918; 2156-017X
• DOI: 10.1109/IEDM.2009.5424223

A new yet simple approach, V D,sat method, without complicate temperature measurement setup, has been developed to investigate the carrier transport characteristics for MOSFET devices in the quasi-ballistic regime. It has shown quite good matches with that of Temperature Dependent Method (TDM) developed from the quantum theory. For the first time, the carrier transport properties after HC stress were also examined based on the proposed method. Moreover, V D,sat method has been applied to examine the carrier transport and reliabilities in advanced strain-CMOS devices. In terms of the device performance, the enhancement of the drain current is strongly related to the transport parameter, the injection velocity, V inj , which serves as a good monitor for the strain design and current enhancement. While, considering the device reliability after the HC stress, ballistic efficiency, B sat is responsible for the ID degradation as a result of the increase in interface scatterings. Finally, a roadmap of the V inj from those reported results has been provided which serves as a good reference for designing high performance strain- based CMOS devices.