A single-transistor silicon synapse

• Published in: IEEE transactions on electron devices 1996-11, Vol.43 (11), p.1972-1980
• Main Authors: Diorio, C., Hasler, P., Minch, A., Mead, C.A.
• Format: Article
• Language: English
• Subjects: EPROM; MOSFETs; Nonvolatile memory; Physics; Prototypes; Read-write memory; Secondary generated hot electron injection; Silicon; Tunneling; Voltage
• ISSN: 0018-9383; 1557-9646
• DOI: 10.1109/16.543035

We have developed a new floating-gate silicon MOS transistor for analog learning applications. The memory storage is nonvolatile; hot-electron injection and electron tunneling permit bidirectional memory updates. Because these updates depend on both the stored memory value and the transistor terminal voltages, the synapse can implement a learning function. We have derived a memory-update rule from the physics of the tunneling and injection processes, and have investigated synapse learning in a prototype array. Unlike conventional EEPROM devices, the synapse allows simultaneous memory reading and writing. Synapse transistor arrays can therefore compute both the array output, and local memory updates, in parallel. The synapse is small, and typically is operated at subthreshold current levels; it will permit the development of dense, low-power silicon learning systems.