A 105db-gain 500mhz-bandwidth 0.1Ω-output-impedance amplifier for an amplitude modulator in 65nm cmos

A 500 MHz -3 dB bandwidth linear amplifier in 65 nm CMOS at 1.2 V supply is presented for an amplitude modulator in a polar transmitter. The design uses a gain-boosting scheme for 105 dB DC gain at an 8 ¿ load and a buffered switching Class-AB bias scheme. It has 0.1 ¿ output impedance at 5 MHz and...

Full description

Saved in:
Bibliographic Details
Main Authors: Kim, Chul, Chae, Chang-seok, Yuk, Young-sub, Kim, Yi-Gyeong, Kwon, Jong-Kee, Cho, Gyu-Hyeong
Format: Conference Proceeding
Language:English
Subjects:
Amplitude modulation
Bandwidth
Circuits
Energy consumption
Impedance
Mirrors
MOSFETs
Negative feedback
Power amplifiers
Voltage
Online Access:Request full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:A 500 MHz -3 dB bandwidth linear amplifier in 65 nm CMOS at 1.2 V supply is presented for an amplitude modulator in a polar transmitter. The design uses a gain-boosting scheme for 105 dB DC gain at an 8 ¿ load and a buffered switching Class-AB bias scheme. It has 0.1 ¿ output impedance at 5 MHz and can drive 60 mA peak current. The chip efficiency is 83.5% and area is 1.35 mm 2 .
ISSN:0193-6530
2376-8606
DOI:10.1109/ISSCC.2010.5434037