A ULSI Architecture for Reconfigurable Serial Systems

A superchip concept is introduced for realising Ultra Large Scale Integrated (ULSI) circuits which incorporate defect/fault tolerance and system reconfiguration. The central architectural component, a large crossbar switch matrix, is demonstrated in silicon. Hypothetical processor examples are illus...

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Main Authors: Chen, W., Mavor, J., Denyer, P. B., Renshaw, D.
Format: Conference Proceeding
Language:English
Subjects:
Circuits
CMOS technology
Communication switching
Complex networks
Computer architecture
Fault tolerance
Fault tolerant systems
Silicon
Switches
Ultra large scale integration
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creator Chen, W.
Mavor, J.
Denyer, P. B.
Renshaw, D.
description A superchip concept is introduced for realising Ultra Large Scale Integrated (ULSI) circuits which incorporate defect/fault tolerance and system reconfiguration. The central architectural component, a large crossbar switch matrix, is demonstrated in silicon. Hypothetical processor examples are illustrated utilising the superchip approach, and design/performance figures are discussed.
format conference_proceeding
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identifier ISBN: 9783800715343
ispartof ESSCIRC '87: 13th European Solid-State Circuits Conference, 1987, p.23-26
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source IEEE Electronic Library (IEL) Conference Proceedings
subjects Circuits
CMOS technology
Communication switching
Complex networks
Computer architecture
Fault tolerance
Fault tolerant systems
Silicon
Switches
Ultra large scale integration
title A ULSI Architecture for Reconfigurable Serial Systems
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