Offset Diffused Drain Transistors for Half-Micron CMOS

Half-micron n- and p-channel transistors with an offset diffused drain structure have been fabricated. A high temperature process and offset implantation of the source-drain dopants was used to obtain graded doping profiles and an optimum effective channel length. Experimental results showed good de...

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Bibliographic Details
Main Authors: Woerlee, P. H., Juffermans, C. A. H., Lifka, H., Lansink, F. M. Oude, Merks-Eppingbroek, H. J. H., Poorter, T., Walker, A. J.
Format: Conference Proceeding
Language:English
Subjects:
CMOS process
Degradation
Doping profiles
Fabrication
Hot carriers
Laboratories
MOSFETs
Power supplies
Temperature
Threshold voltage
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Summary:Half-micron n- and p-channel transistors with an offset diffused drain structure have been fabricated. A high temperature process and offset implantation of the source-drain dopants was used to obtain graded doping profiles and an optimum effective channel length. Experimental results showed good device quality. The extrapolated lifetime for the n-channel device was 5 years at a power supply voltage of 4.5 V. Hot carrier degradation in p-channel devices cannot be neglected anymore.