Design of a multi-channel pre-beamform data acquisition system for an ultrasound research scanner

• Main Authors: Tsang, I.K.H., Yiu, B.Y.S., Cheung, D.K.H., Chiu, H.C.T., Cheung, C.C.P., Yu, A.C.H.
• Format: Conference Proceeding
• Language: English
• Subjects: Adaptive arrays; Array signal processing; Connectors; Data acquisition; Field programmable gate arrays; Hardware; In vitro; multi-channel data acquisition; pre-beamform data; Probes; Prototypes; system hardware design; Ultrasonic imaging
• ISSN: 1051-0117
• DOI: 10.1109/ULTSYM.2009.5441869

Access to the pre-beamform data of each array channel on an ultrasound scanner is important to experimental investigations on advanced imaging research topics like adaptive beamforming and synthetic aperture imaging. Through such data access, we can obtain in-vitro or in-vivo insights on various imaging methods without resorting to hardware implementation. This paper reports the development of a pre-beamform data acquisition (DAQ) system that can collect data from 128 array elements in parallel. Our DAQ system is intended to interface with a Sonix-RP research scanner through a probe connector port. It comprises three major blocks: 1) a connector board that interfaces with the array probe and the scanner; 2) a main board that triggers data acquisition and controls data transfer to a computer; 3) four receiver boards that are each responsible for acquiring 32 channels of digitized raw data and storing them to the on-board DDR2 memory. The probe-connecting end of this system is interfaced with TX810 chips to facilitate switching between transmit and receive modes. When receiving data, the incoming analog signal is first passed into a low-noise amplifier. These signals are then sent into AD9272 chips on the four receiver boards to perform time gain compensation, anti-alias filtering, and 12-bit data sampling at an 80MHz rate. Subsequently, the digitized signal samples are de-serialized using a Virtex-5 FPGA and are stored into DDR2 memory. To facilitate data retrieval, we implemented a Virtex-5 FPGA on the main board to initiate data transfer, and if preferred, to perform on-board beamforming (programmable by user) prior to sending data to a computer through a USB 2.0 link. For our prototype, we used 16GB of DDR2 memory for data storage. With a frame rate of 35Hz, a 10cm depth-of-view and 128 transmit firings per frame, this DAQ system is capable of collecting pre-beamform data from all array channels for 2.5 seconds. We are currently completing the prototype development in collaboration with Ultrasonix.