Design of a Dual-mode Clock Generator based on a PLL Structure

A Dual-mode clock generator based on a PLL(phase locked Loop)was proposed. The circuit, which provides 400 KHz internal fixed frequency mode and external input mode with a phase-lockable frequency range from 400 KHz to 2 MHz, is applicable to SMPS (Switching Mode Power Supply) controller IC to optim...

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Bibliographic Details
Main Authors: Zhou, Yin, Wu, Xiaobo, Jiana, Lou, Hu, Lin
Format: Conference Proceeding
Language:English
Subjects:
Circuit simulation
Clocks
Phase detection
Phase frequency detector
Phase locked loops
Power system management
Signal generators
Switched-mode power supply
Very large scale integration
Voltage-controlled oscillators
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Description
Summary:A Dual-mode clock generator based on a PLL(phase locked Loop)was proposed. The circuit, which provides 400 KHz internal fixed frequency mode and external input mode with a phase-lockable frequency range from 400 KHz to 2 MHz, is applicable to SMPS (Switching Mode Power Supply) controller IC to optimize its performance. A novel oscillation generator for low frequency application is introduced. The circuit was designed under 1.5 um BCD (Bipolar-CMOS-DMOS) process technology. The simulation results show the circuit works well and achieves all expected functions.
ISSN:2157-4839
DOI:10.1109/APPEEC.2010.5448494