Scaling limits of Si MOSFET technology imposed by random parameter fluctuations

• Main Authors: De, V.K., Xinghai Tang, Meindl, J.D.
• Format: Conference Proceeding
• Language: English
• Subjects: CMOS technology; Contracts; Current distribution; Doping; Fluctuations; Microscopy; MOSFET circuits; Semiconductor process modeling; Subthreshold current; Threshold voltage
• DOI: 10.1109/DRC.1996.546336

Intrinsic random dopant placement-induced distributions in threshold voltage, subthreshold swing, saturation drain current and subthreshold leakage of sub-0.1 /spl mu/m MOSFETs are examined using novel physical models and a Monte Carlo simulator. These models, derived from fundamental device analysis, are validated through comparisons with device parameter distributions obtained from Monte-Carlo simulations of MOSFETs with more than 1000 distinct random dopant atom placements. The strong intrinsic interactions (even in the absence of extrinsic dimensional variations) between the distribution characteristics and the degree of Drain-Induced Barrier Lowering (DIBL) in the target MOSFET are revealed and elucidated for the first time. Fundamental limitations imposed by these fluctuations on scaling of supply voltage, channel length and level of integration in multi-billion transistor chips are projected.