Innovation in solid state devices for exascale computing

• Main Author: Tze-chiang Chen
• Format: Conference Proceeding
• Language: eng ; jpn
• Subjects: CMOS technology; Costs; Logic devices; Memory architecture; Nanophotonics; Silicon devices; Solid state circuits; Switches; System performance; Technological innovation
• ISSN: 1524-766X; 2690-8174
• DOI: 10.1109/VTSA.2010.5488971

The continuous scaling of CMOS technology has enabled system performance to double every two years for the past 40 years. However, new classes of applications will demand a much faster rate of improvement such as 2×/year in order to reach exaflop capabilities by the end of this decade. These applications represent a significant growth opportunity and require continued innovation in solid state technology including a new generation of silicon device scaling and a number of non-silicon logic switches which have been proposed as replacements. In addition, new system architectures will take advantage of 3D chip technology to enable a higher level of hybrid integration. New memory technology will allow implementation of a new level of memory architecture, while silicon nanophotonics on the processor will meet ultra-low power, low cost, and high density communications needs. These and other innovations will lead to significant improvement in systems integration, performance, and power efficiency for future applications. The roadmap that will be presented will drive semiconductor technology for decades to come.