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Contention-Tolerant Crossbar Packet Switches without and with Speedup
We propose an innovative agile crossbar switch architecture called contention-tolerant crossbar, denoted by CTC(N). Unlike the conventional crossbar and the crossbar with crosspoint buffers, which require complex hardware resolvers to grant one out of multiple output requests, CTC(N) can tolerate ou...
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creator | Guannan Qu Hyung Jae Chang Jianping Wang Zhiyi Fang Zheng, S Q |
description | We propose an innovative agile crossbar switch architecture called contention-tolerant crossbar, denoted by CTC(N). Unlike the conventional crossbar and the crossbar with crosspoint buffers, which require complex hardware resolvers to grant one out of multiple output requests, CTC(N) can tolerate output contentions by a pipelining mechanism, with pipeline stages implemented as buffers in input ports. These buffers are used to decouple the scheduling task into N independent parts in such a way that N schedulers are located in N input ports, and they operate independently and in parallel. Without using arbiters and/or crosspoint buffers that require additional chip area, the CTC(N) switch is more scalable than existing crossbars. We analyze the throughput of CTC(N) switch without and with internal speedup by building a queuing model. We show that, under Bernoulli i.i.d. uniform traffic, CTC(N) without internal speedup has worst-case throughput of 63%, and CTC(N) achieves 100% throughput with internal speedup 2. Our simulation results validate our theoretical analysis. |
doi_str_mv | 10.1109/ICC.2010.5502013 |
format | conference_proceeding |
fullrecord | <record><control><sourceid>ieee_6IE</sourceid><recordid>TN_cdi_ieee_primary_5502013</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>5502013</ieee_id><sourcerecordid>5502013</sourcerecordid><originalsourceid>FETCH-LOGICAL-i175t-4c7cebe28f53f28d81e3b32f3d776831610493e0df58606de4f66212524e01193</originalsourceid><addsrcrecordid>eNpFkE1Lw0AQhtePgmn1LnjJH9i6s7O72RwltFooKLSCt7LJTmi0JiG7Rfz3Bi14emZ4eAfmZewWxBxA5PerophLMW5ai5F4xqagpFJGCXw7ZwnkaDlYixf_QsLlKMYARyOyCUsscKNyrbIrNg3hXQgtc4SELYqujdTGpmv5tjvQ4NqYFkMXQumG9MVVHxTTzVcTqz2FdOS-O8bUtf53Tjc9kT_212xSu0OgmxNn7HW52BZPfP38uCoe1ryBTEeuqqyikqStNdbSeguEJcoafZYZi2BAqBxJ-FpbI4wnVRsjQWqpSMD454zd_d1tiGjXD82nG753p17wB1RtT4I</addsrcrecordid><sourcetype>Publisher</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype></control><display><type>conference_proceeding</type><title>Contention-Tolerant Crossbar Packet Switches without and with Speedup</title><source>IEEE Electronic Library (IEL) Conference Proceedings</source><creator>Guannan Qu ; Hyung Jae Chang ; Jianping Wang ; Zhiyi Fang ; Zheng, S Q</creator><creatorcontrib>Guannan Qu ; Hyung Jae Chang ; Jianping Wang ; Zhiyi Fang ; Zheng, S Q</creatorcontrib><description>We propose an innovative agile crossbar switch architecture called contention-tolerant crossbar, denoted by CTC(N). Unlike the conventional crossbar and the crossbar with crosspoint buffers, which require complex hardware resolvers to grant one out of multiple output requests, CTC(N) can tolerate output contentions by a pipelining mechanism, with pipeline stages implemented as buffers in input ports. These buffers are used to decouple the scheduling task into N independent parts in such a way that N schedulers are located in N input ports, and they operate independently and in parallel. Without using arbiters and/or crosspoint buffers that require additional chip area, the CTC(N) switch is more scalable than existing crossbars. We analyze the throughput of CTC(N) switch without and with internal speedup by building a queuing model. We show that, under Bernoulli i.i.d. uniform traffic, CTC(N) without internal speedup has worst-case throughput of 63%, and CTC(N) achieves 100% throughput with internal speedup 2. Our simulation results validate our theoretical analysis.</description><identifier>ISSN: 1550-3607</identifier><identifier>ISBN: 1424464021</identifier><identifier>ISBN: 9781424464029</identifier><identifier>EISSN: 1938-1883</identifier><identifier>EISBN: 142446403X</identifier><identifier>EISBN: 9781424464043</identifier><identifier>EISBN: 1424464048</identifier><identifier>EISBN: 9781424464036</identifier><identifier>DOI: 10.1109/ICC.2010.5502013</identifier><identifier>LCCN: 81-649547</identifier><language>eng</language><publisher>IEEE</publisher><subject>Communications Society ; Computer science ; Delay ; Hardware ; Packet switching ; Pipeline processing ; Quality of service ; Scheduling algorithm ; Switches ; Throughput</subject><ispartof>2010 IEEE International Conference on Communications, 2010, p.1-6</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/5502013$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,776,780,785,786,2052,27902,54530,54895,54907</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/5502013$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Guannan Qu</creatorcontrib><creatorcontrib>Hyung Jae Chang</creatorcontrib><creatorcontrib>Jianping Wang</creatorcontrib><creatorcontrib>Zhiyi Fang</creatorcontrib><creatorcontrib>Zheng, S Q</creatorcontrib><title>Contention-Tolerant Crossbar Packet Switches without and with Speedup</title><title>2010 IEEE International Conference on Communications</title><addtitle>ICC</addtitle><description>We propose an innovative agile crossbar switch architecture called contention-tolerant crossbar, denoted by CTC(N). Unlike the conventional crossbar and the crossbar with crosspoint buffers, which require complex hardware resolvers to grant one out of multiple output requests, CTC(N) can tolerate output contentions by a pipelining mechanism, with pipeline stages implemented as buffers in input ports. These buffers are used to decouple the scheduling task into N independent parts in such a way that N schedulers are located in N input ports, and they operate independently and in parallel. Without using arbiters and/or crosspoint buffers that require additional chip area, the CTC(N) switch is more scalable than existing crossbars. We analyze the throughput of CTC(N) switch without and with internal speedup by building a queuing model. We show that, under Bernoulli i.i.d. uniform traffic, CTC(N) without internal speedup has worst-case throughput of 63%, and CTC(N) achieves 100% throughput with internal speedup 2. Our simulation results validate our theoretical analysis.</description><subject>Communications Society</subject><subject>Computer science</subject><subject>Delay</subject><subject>Hardware</subject><subject>Packet switching</subject><subject>Pipeline processing</subject><subject>Quality of service</subject><subject>Scheduling algorithm</subject><subject>Switches</subject><subject>Throughput</subject><issn>1550-3607</issn><issn>1938-1883</issn><isbn>1424464021</isbn><isbn>9781424464029</isbn><isbn>142446403X</isbn><isbn>9781424464043</isbn><isbn>1424464048</isbn><isbn>9781424464036</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2010</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><recordid>eNpFkE1Lw0AQhtePgmn1LnjJH9i6s7O72RwltFooKLSCt7LJTmi0JiG7Rfz3Bi14emZ4eAfmZewWxBxA5PerophLMW5ai5F4xqagpFJGCXw7ZwnkaDlYixf_QsLlKMYARyOyCUsscKNyrbIrNg3hXQgtc4SELYqujdTGpmv5tjvQ4NqYFkMXQumG9MVVHxTTzVcTqz2FdOS-O8bUtf53Tjc9kT_212xSu0OgmxNn7HW52BZPfP38uCoe1ryBTEeuqqyikqStNdbSeguEJcoafZYZi2BAqBxJ-FpbI4wnVRsjQWqpSMD454zd_d1tiGjXD82nG753p17wB1RtT4I</recordid><startdate>201005</startdate><enddate>201005</enddate><creator>Guannan Qu</creator><creator>Hyung Jae Chang</creator><creator>Jianping Wang</creator><creator>Zhiyi Fang</creator><creator>Zheng, S Q</creator><general>IEEE</general><scope>6IE</scope><scope>6IH</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIO</scope></search><sort><creationdate>201005</creationdate><title>Contention-Tolerant Crossbar Packet Switches without and with Speedup</title><author>Guannan Qu ; Hyung Jae Chang ; Jianping Wang ; Zhiyi Fang ; Zheng, S Q</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i175t-4c7cebe28f53f28d81e3b32f3d776831610493e0df58606de4f66212524e01193</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2010</creationdate><topic>Communications Society</topic><topic>Computer science</topic><topic>Delay</topic><topic>Hardware</topic><topic>Packet switching</topic><topic>Pipeline processing</topic><topic>Quality of service</topic><topic>Scheduling algorithm</topic><topic>Switches</topic><topic>Throughput</topic><toplevel>online_resources</toplevel><creatorcontrib>Guannan Qu</creatorcontrib><creatorcontrib>Hyung Jae Chang</creatorcontrib><creatorcontrib>Jianping Wang</creatorcontrib><creatorcontrib>Zhiyi Fang</creatorcontrib><creatorcontrib>Zheng, S Q</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan (POP) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE/IET Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP) 1998-present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Guannan Qu</au><au>Hyung Jae Chang</au><au>Jianping Wang</au><au>Zhiyi Fang</au><au>Zheng, S Q</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Contention-Tolerant Crossbar Packet Switches without and with Speedup</atitle><btitle>2010 IEEE International Conference on Communications</btitle><stitle>ICC</stitle><date>2010-05</date><risdate>2010</risdate><spage>1</spage><epage>6</epage><pages>1-6</pages><issn>1550-3607</issn><eissn>1938-1883</eissn><isbn>1424464021</isbn><isbn>9781424464029</isbn><eisbn>142446403X</eisbn><eisbn>9781424464043</eisbn><eisbn>1424464048</eisbn><eisbn>9781424464036</eisbn><abstract>We propose an innovative agile crossbar switch architecture called contention-tolerant crossbar, denoted by CTC(N). Unlike the conventional crossbar and the crossbar with crosspoint buffers, which require complex hardware resolvers to grant one out of multiple output requests, CTC(N) can tolerate output contentions by a pipelining mechanism, with pipeline stages implemented as buffers in input ports. These buffers are used to decouple the scheduling task into N independent parts in such a way that N schedulers are located in N input ports, and they operate independently and in parallel. Without using arbiters and/or crosspoint buffers that require additional chip area, the CTC(N) switch is more scalable than existing crossbars. We analyze the throughput of CTC(N) switch without and with internal speedup by building a queuing model. We show that, under Bernoulli i.i.d. uniform traffic, CTC(N) without internal speedup has worst-case throughput of 63%, and CTC(N) achieves 100% throughput with internal speedup 2. Our simulation results validate our theoretical analysis.</abstract><pub>IEEE</pub><doi>10.1109/ICC.2010.5502013</doi><tpages>6</tpages></addata></record> |
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subjects | Communications Society Computer science Delay Hardware Packet switching Pipeline processing Quality of service Scheduling algorithm Switches Throughput |
title | Contention-Tolerant Crossbar Packet Switches without and with Speedup |
url | http://sfxeu10.hosted.exlibrisgroup.com/loughborough?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-29T15%3A25%3A02IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-ieee_6IE&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=Contention-Tolerant%20Crossbar%20Packet%20Switches%20without%20and%20with%20Speedup&rft.btitle=2010%20IEEE%20International%20Conference%20on%20Communications&rft.au=Guannan%20Qu&rft.date=2010-05&rft.spage=1&rft.epage=6&rft.pages=1-6&rft.issn=1550-3607&rft.eissn=1938-1883&rft.isbn=1424464021&rft.isbn_list=9781424464029&rft_id=info:doi/10.1109/ICC.2010.5502013&rft.eisbn=142446403X&rft.eisbn_list=9781424464043&rft.eisbn_list=1424464048&rft.eisbn_list=9781424464036&rft_dat=%3Cieee_6IE%3E5502013%3C/ieee_6IE%3E%3Cgrp_id%3Ecdi_FETCH-LOGICAL-i175t-4c7cebe28f53f28d81e3b32f3d776831610493e0df58606de4f66212524e01193%3C/grp_id%3E%3Coa%3E%3C/oa%3E%3Curl%3E%3C/url%3E&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=5502013&rfr_iscdi=true |