A High-Level Mapping Algorithm Targeting 3D NoC Architectures with Multiple Vdd

The communication problem in modern ICs becomes a challenge issue. This paper introduces a high-level mapping algorithm targeting to low-power 3D NoC devices. By appropriately assigning application's functionalities to layers with different supply voltages we achieve reasonable energy savings a...

Full description

Saved in:
Bibliographic Details
Main Authors: Siozios, K, Anagnostopoulos, I, Soudris, D
Format: Conference Proceeding
Language:English
Subjects:
Computer architecture
Converters
Energy dissipation
MPEG 4 Standard
Optimization
Three dimensional displays
Wires
Online Access:Request full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:The communication problem in modern ICs becomes a challenge issue. This paper introduces a high-level mapping algorithm targeting to low-power 3D NoC devices. By appropriately assigning application's functionalities to layers with different supply voltages we achieve reasonable energy savings and temperature reduction. Additionally, our methodology supports real-time adaption on different traffic scenarios. Experimental results show that energy savings up to 19% are feasible, without any area and delay overhead, as compared to architectures powered by only one supply voltage.
ISSN:2159-3469
2159-3477
DOI:10.1109/ISVLSI.2010.98