Extremely thin SOI (ETSOI) technology: Past, present, and future

As the mainstream bulk devices face formidable challenges to scale beyond 20nm node, there is an increasingly renewed interest in fully depleted devices for continued CMOS scaling. In this paper, we provide an overview of extremely thin SOI (ETSOI), a viable fully depleted device architecture for fu...

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Bibliographic Details
Main Authors: Cheng, K, Khakifirooz, A, Kulkarni, P, Ponoth, S, Kuss, J, Edge, L F, Kimball, A, Kanakasabapathy, S, Schmitz, S, Reznicek, A, Adam, T, He, H, Mehta, S, Upham, A, Seo, S, Herman, J L, Johnson, R, Zhu, Y, Jamison, P, Haran, B S, Zhu, Z, Fan, S, Bu, H, Sadana, D K, Kozlowski, P, O'Neill, J, Doris, B, Shahidi, G
Format: Conference Proceeding
Language:English
Subjects:
CMOS integrated circuits
Logic gates
Manufacturing
Performance evaluation
Silicon
Substrates
System-on-a-chip
Online Access:Request full text
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Summary:As the mainstream bulk devices face formidable challenges to scale beyond 20nm node, there is an increasingly renewed interest in fully depleted devices for continued CMOS scaling. In this paper, we provide an overview of extremely thin SOI (ETSOI), a viable fully depleted device architecture for future technology. Barriers that prevented ETSOI becoming a mainstream technology in the past are specified and solutions to overcome those barriers are provided.
ISSN:1078-621X
2577-2295
DOI:10.1109/SOI.2010.5641473