An SOI technology optimized ASIC design system

Silicon on insulator (SOI) technology is an excellent choice for chip designs that require high performance and low power. IBM's SOI custom logic (ASIC) design system uses internal tools and flows in combination with solutions from a network of proven EDA vendors to support these high performan...

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Bibliographic Details
Main Authors: Zuchowski, P S, Bentlage, S M, Kuemerle, M W
Format: Conference Proceeding
Language:English
Subjects:
application specific integrated circuits
Clocks
custom logic
design system
History
IP networks
Logic gates
power
Semiconductor process modeling
silicon on insulator
Silicon on insulator technology
Timing
very-large-scale integration
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Description
Summary:Silicon on insulator (SOI) technology is an excellent choice for chip designs that require high performance and low power. IBM's SOI custom logic (ASIC) design system uses internal tools and flows in combination with solutions from a network of proven EDA vendors to support these high performance designs while managing the additional complexities introduced by the SOI process. The use of a qualified design system can add schedule predictability while simultaneously achieving high performance and power predictability. In this paper, we describe a high performance methodology for custom designs using a combination of Cadence, Synopsys, and IBM tools and flows. We discuss the benefits and challenges of the SOI technology and share results of high performance designs that were successfully manufactured using this methodology.
ISSN:1078-621X
2577-2295
DOI:10.1109/SOI.2010.5641485