VLSI implementation of an associative content addressable memory based on Hopfield network model

The content addressable memory (CAM) is allowed to search a data word without knowing where its address is. In addition, it is permissible to associate the content of the location or neighboring locations where the data word was identified. This paper presents our own approach for VLSI hardware impl...

Full description

Saved in:
Bibliographic Details
Main Authors: Ionescu, Laurentiu Mihai, Mazare, Alin Gheorghita, Serban, Gheorghe
Format: Conference Proceeding
Language:English
Subjects:
Arrays
Associative memory
Computer aided manufacturing
Content addressable memory (CAM) associative memory
Field programmable gate arrays
Field Programmable Gates Array (FPGA)
Hardware
Hopfield network
Hopfield neural networks
Neurons
Online Access:Request full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:The content addressable memory (CAM) is allowed to search a data word without knowing where its address is. In addition, it is permissible to associate the content of the location or neighboring locations where the data word was identified. This paper presents our own approach for VLSI hardware implementation of the CAM memory. The proposed solution uses a Hopfield neural network model and is characterized by simplicity and the possibility of using the same hardware structures for saving may data patterns. Will be presented design methods and implementation to VLSI circuit structures, the performance of our solution and experimental results.
ISSN:1545-827X
2377-0678
DOI:10.1109/SMICND.2010.5650469