Design method and test structure to characterize and repair TSV defect induced signal degradation in 3D system

In this paper we present a test structure and design methodology for testing, characterization, and self-repair of TSVs in 3D ICs. The proposed structure can detect the signal degradation through TSVs due to resistive shorts and variations in TSV. For TSVs with moderate signal degradations, the prop...

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Bibliographic Details
Main Authors: Minki Cho, Chang Liu, Dae Hyun Kim, Sung Kyu Lim, Mukhopadhyay, Saibal
Format: Conference Proceeding
Language:English
Subjects:
Degradation
Delay
Flip-flops
Receivers
Resistance
Three dimensional displays
Through-silicon vias
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Description
Summary:In this paper we present a test structure and design methodology for testing, characterization, and self-repair of TSVs in 3D ICs. The proposed structure can detect the signal degradation through TSVs due to resistive shorts and variations in TSV. For TSVs with moderate signal degradations, the proposed structure reconfigures itself as signal recovery circuit to improve signal fidelity. The paper presents the design of the test/recovery structure, the test methodologies, and demonstrates its effectiveness through stand alone simulations as well as in a full-chip physical design of a 3D IC.
ISSN:1092-3152
1558-2434
DOI:10.1109/ICCAD.2010.5654255