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Embedded system environment: A framework for TLM-based design and prototyping
This paper presents Embedded System Environment (ESE), which is a comprehensive set of tools for supporting a model-based design methodology for multi-processor embedded systems. It consists of two parts: ESE Front-End and ESE BackEnd. ESE Front-End provides automatic generation of SystemC transacti...
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creator | Abdi, S Yonghyun Hwang Lochi Yu Hansu Cho Viskic, I Gajski, D D |
description | This paper presents Embedded System Environment (ESE), which is a comprehensive set of tools for supporting a model-based design methodology for multi-processor embedded systems. It consists of two parts: ESE Front-End and ESE BackEnd. ESE Front-End provides automatic generation of SystemC transaction level models (TLMs) from graphical capture of system platform and application C/C++ code. ESE generated TLMs can be used either as virtual platforms for SW development or for fast and early timing estimation of system performance. ESE Back-End provides automatic synthesis from TLM to Cycle Accurate Model (CAM) consisting of RTL interfaces, system SW and prototype ready FPGA project files. ESE generated RTL can be synthesized using standard logic synthesis tools and system SW can be compiled along with application code for target processors. ESE automatically creates Xilinx EDK projects for board prototyping. Our experimental results demonstrate that ESE can drastically reduce embedded system design and prototyping time, while maintaining design quality similar to manual design. |
doi_str_mv | 10.1109/RSP.2010.5656342 |
format | conference_proceeding |
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It consists of two parts: ESE Front-End and ESE BackEnd. ESE Front-End provides automatic generation of SystemC transaction level models (TLMs) from graphical capture of system platform and application C/C++ code. ESE generated TLMs can be used either as virtual platforms for SW development or for fast and early timing estimation of system performance. ESE Back-End provides automatic synthesis from TLM to Cycle Accurate Model (CAM) consisting of RTL interfaces, system SW and prototype ready FPGA project files. ESE generated RTL can be synthesized using standard logic synthesis tools and system SW can be compiled along with application code for target processors. ESE automatically creates Xilinx EDK projects for board prototyping. Our experimental results demonstrate that ESE can drastically reduce embedded system design and prototyping time, while maintaining design quality similar to manual design.</abstract><pub>IEEE</pub><doi>10.1109/RSP.2010.5656342</doi><tpages>7</tpages></addata></record> |
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source | IEEE Xplore All Conference Series |
subjects | Computational modeling Data models Hardware MPSoC multi-processor embedded systems Software system synthesis Time domain analysis Time varying systems Transaction level model Transducers virtual prototyping |
title | Embedded system environment: A framework for TLM-based design and prototyping |
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