Reliability analysis of a new vertical MOSFET with bMPI structure for 1T-DRAM applications

We present a reliability analysis of a new vertical MOSFET with the middle partial insulation and block oxide (bMPI) structure for 1T-DRAM applications. The proposed 1T-DRAM device can increase the pseudo-neutral region due to the bMPI under the vertical channel and its device sensing current window...

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Bibliographic Details
Main Authors: Cheng-Hsin Chen, Jyi-Tsong Lin, Po-Hsieh Lin, Yi-Chuen Eng, Hsien-Nan Chiu, Tzu-Feng Chang, Hsuan-Hsu Chen
Format: Conference Proceeding
Language:English
Subjects:
Controllability
Fabrication
Logic gates
Programming
Temperature
Temperature sensors
Transient analysis
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Summary:We present a reliability analysis of a new vertical MOSFET with the middle partial insulation and block oxide (bMPI) structure for 1T-DRAM applications. The proposed 1T-DRAM device can increase the pseudo-neutral region due to the bMPI under the vertical channel and its device sensing current window is improved by about 95% when compared to the planer bMPI 1T-DRAM. Owing to the double-gate structure, vertical bMPI has great gate controllability over the channel region; hence, it can reduce the short-channel effects (SCEs) and enhance the current drive. And the VbMPI 1T-DRAM cell can keep holes in nature body region, which leads to an increase in data retention time.
DOI:10.1109/ICSICT.2010.5667297