A novel vertical MOSFET with bMPI structure for 1T-DRAM application

This paper proposes a novel vertical MOSFET with the middle partial insulation and block oxide (bMPI) structure for 1T-DRAM application. The bMPI 1T-DRAM can increase the pseudo-neutral region due to the bMPI under the vertical channel and its device sensing current window is improved about 95% when...

Full description

Saved in:
Bibliographic Details
Main Authors: Cheng-Hsin Chen, Jyi-Tsong Lin, Yi-Chuen Eng, Po-Hsieh Lin, Hsien-Nan Chiu, Tzu-Feng Chang, Chih-Hsuan Tai, Kuan-Yu Lu, Yi-Hsuan Fan, Yu-Che Chang, Hsuan-Hsu Chen
Format: Conference Proceeding
Language:English
Subjects:
1T-DRAM
bMPI
Capacitorless
Fabrication
Implants
Logic gates
Oxidation
Performance evaluation
Random access memory
Vertical
Writing
Online Access:Request full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:This paper proposes a novel vertical MOSFET with the middle partial insulation and block oxide (bMPI) structure for 1T-DRAM application. The bMPI 1T-DRAM can increase the pseudo-neutral region due to the bMPI under the vertical channel and its device sensing current window is improved about 95% when compared to the planer bMPI 1T-DRAM. Because of the double gate structure, the proposed device has great gate controllability; hence, it can reduce the short-channel effects and enhance the electrical characteristics.
ISSN:2378-8593
DOI:10.1109/ISNE.2010.5669180