Loading…
Low voltage low power neuron circuit design based on subthreshold FGMOS transistors and XOR implementation
In this work, design of low-voltage low-power analog artificial neural network (ANN) circuit blocks by using subthreshold floating-gate MOS (FGMOS) transistors and a neuron circuit is implemented. The circuit blocks, four-quadrant analog current multiplier and FGMOS based differential pair, have bee...
Saved in:
Main Authors: | , |
---|---|
Format: | Conference Proceeding |
Language: | English |
Subjects: | |
Online Access: | Request full text |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Summary: | In this work, design of low-voltage low-power analog artificial neural network (ANN) circuit blocks by using subthreshold floating-gate MOS (FGMOS) transistors and a neuron circuit is implemented. The circuit blocks, four-quadrant analog current multiplier and FGMOS based differential pair, have been designed and simulated in CADENCE environment with TSMC 0.35μm process parameters. Using the proposed neuron circuits a neural network was realized. XOR problem was applied to test accuracy of the network and the results were concluded. |
---|---|
DOI: | 10.1109/SM2ACD.2010.5672347 |