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Development of an analogue microprocessor
Progress towards the development of a reconfigurable analogue cell array is reported. The integrated circuit array can be thought of as an Analogue Microprocessor (AMP) analogous in many ways to its digital counterpart. The essential feature of the AMP is that it performs concurrent processing of an...
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| creator | Grundy, D.L. Bozic, M. Hatfield, J.V. |
| description | Progress towards the development of a reconfigurable analogue cell array is reported. The integrated circuit array can be thought of as an Analogue Microprocessor (AMP) analogous in many ways to its digital counterpart. The essential feature of the AMP is that it performs concurrent processing of analogue signals in continuous time. The processors of the array have a simple instruction set, typically ADD, NEGATE, LOG, ANTILOG, INTEGRATE, RECTIFY, etc. The array is digitally field programmable; ultimately yielding a device in the analogue domain comparable to logic cell arrays in the digital domain. |
| doi_str_mv | 10.1109/ICVD.1997.568169 |
| format | conference_proceeding |
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The integrated circuit array can be thought of as an Analogue Microprocessor (AMP) analogous in many ways to its digital counterpart. The essential feature of the AMP is that it performs concurrent processing of analogue signals in continuous time. The processors of the array have a simple instruction set, typically ADD, NEGATE, LOG, ANTILOG, INTEGRATE, RECTIFY, etc. The array is digitally field programmable; ultimately yielding a device in the analogue domain comparable to logic cell arrays in the digital domain.</description><identifier>ISSN: 1063-9667</identifier><identifier>ISBN: 9780818677557</identifier><identifier>ISBN: 0818677554</identifier><identifier>EISSN: 2380-6923</identifier><identifier>DOI: 10.1109/ICVD.1997.568169</identifier><language>eng</language><publisher>IEEE</publisher><subject>Costs ; Design automation ; Field programmable analog arrays ; Manufacturing ; Microprocessors ; Process design ; Programmable logic arrays ; Signal processing ; Signal sampling ; Very large scale integration</subject><ispartof>Proceedings Tenth International Conference on VLSI Design, 1997, p.420-424</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/568169$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,780,784,789,790,2058,4050,4051,27925,54555,54920,54932</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/568169$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Grundy, D.L.</creatorcontrib><creatorcontrib>Bozic, M.</creatorcontrib><creatorcontrib>Hatfield, J.V.</creatorcontrib><title>Development of an analogue microprocessor</title><title>Proceedings Tenth International Conference on VLSI Design</title><addtitle>ICVD</addtitle><description>Progress towards the development of a reconfigurable analogue cell array is reported. The integrated circuit array can be thought of as an Analogue Microprocessor (AMP) analogous in many ways to its digital counterpart. The essential feature of the AMP is that it performs concurrent processing of analogue signals in continuous time. The processors of the array have a simple instruction set, typically ADD, NEGATE, LOG, ANTILOG, INTEGRATE, RECTIFY, etc. The array is digitally field programmable; ultimately yielding a device in the analogue domain comparable to logic cell arrays in the digital domain.</description><subject>Costs</subject><subject>Design automation</subject><subject>Field programmable analog arrays</subject><subject>Manufacturing</subject><subject>Microprocessors</subject><subject>Process design</subject><subject>Programmable logic arrays</subject><subject>Signal processing</subject><subject>Signal sampling</subject><subject>Very large scale integration</subject><issn>1063-9667</issn><issn>2380-6923</issn><isbn>9780818677557</isbn><isbn>0818677554</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>1997</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><recordid>eNotj01Lw0AQQBc_wFh7F0-5ekic2U1md46S-lEoeFGvZbOZlUjTDUkV_PcKFR6824On1DVCiQh8t27eVyUy27Imh8QnKtPGQUGszalasnXg0JG1dW3PVIZApmAie6Eu5_kTAFwNNlO3K_mWXRoH2R_yFHO__8Pv0seX5EMfpjROKcg8p-lKnUe_m2X574V6e3x4bZ6LzcvTurnfFD1CdSiMbqFzjsUZj1F3Al3rKVZtG3QlNugao9fsmDCGltiRxgq9j-Kt6UwwC3Vz7PYish2nfvDTz_Y4aX4BWHBDoQ</recordid><startdate>1997</startdate><enddate>1997</enddate><creator>Grundy, D.L.</creator><creator>Bozic, M.</creator><creator>Hatfield, J.V.</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>1997</creationdate><title>Development of an analogue microprocessor</title><author>Grundy, D.L. ; Bozic, M. ; Hatfield, J.V.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i104t-32b0d889e83a1f2de0dba6f4bbc24e7c251fa298961fcb69862141aafea73d3c3</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>1997</creationdate><topic>Costs</topic><topic>Design automation</topic><topic>Field programmable analog arrays</topic><topic>Manufacturing</topic><topic>Microprocessors</topic><topic>Process design</topic><topic>Programmable logic arrays</topic><topic>Signal processing</topic><topic>Signal sampling</topic><topic>Very large scale integration</topic><toplevel>online_resources</toplevel><creatorcontrib>Grundy, D.L.</creatorcontrib><creatorcontrib>Bozic, M.</creatorcontrib><creatorcontrib>Hatfield, J.V.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library Online</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Grundy, D.L.</au><au>Bozic, M.</au><au>Hatfield, J.V.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Development of an analogue microprocessor</atitle><btitle>Proceedings Tenth International Conference on VLSI Design</btitle><stitle>ICVD</stitle><date>1997</date><risdate>1997</risdate><spage>420</spage><epage>424</epage><pages>420-424</pages><issn>1063-9667</issn><eissn>2380-6923</eissn><isbn>9780818677557</isbn><isbn>0818677554</isbn><abstract>Progress towards the development of a reconfigurable analogue cell array is reported. The integrated circuit array can be thought of as an Analogue Microprocessor (AMP) analogous in many ways to its digital counterpart. The essential feature of the AMP is that it performs concurrent processing of analogue signals in continuous time. The processors of the array have a simple instruction set, typically ADD, NEGATE, LOG, ANTILOG, INTEGRATE, RECTIFY, etc. The array is digitally field programmable; ultimately yielding a device in the analogue domain comparable to logic cell arrays in the digital domain.</abstract><pub>IEEE</pub><doi>10.1109/ICVD.1997.568169</doi><tpages>5</tpages></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | ISSN: 1063-9667 |
| ispartof | Proceedings Tenth International Conference on VLSI Design, 1997, p.420-424 |
| issn | 1063-9667 2380-6923 |
| language | eng |
| recordid | cdi_ieee_primary_568169 |
| source | IEEE Xplore All Conference Series |
| subjects | Costs Design automation Field programmable analog arrays Manufacturing Microprocessors Process design Programmable logic arrays Signal processing Signal sampling Very large scale integration |
| title | Development of an analogue microprocessor |
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