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Modeling of temperature effect on threshold voltage of ballistic Ge tunneling FET
The effect of temperature and scaling of gate length on the threshold voltage of double gate Ge tunneling FET has been studied. The threshold voltage has been determined from transconductance rather than constant current method. In the 10 nm to 50 nm range scaling has almost no effect on threshold v...
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creator | Siddiqui, S A Zubair, A Shoron, O F Khosru, Q D M |
description | The effect of temperature and scaling of gate length on the threshold voltage of double gate Ge tunneling FET has been studied. The threshold voltage has been determined from transconductance rather than constant current method. In the 10 nm to 50 nm range scaling has almost no effect on threshold voltage. However, threshold voltage is function of temperature in the range of 250-500 K. Besides, a simple model for threshold voltage incorporating the temperature effect has been developed for ballistic Ge tunneling FET based on the simulated results. |
doi_str_mv | 10.1109/ICELCE.2010.5700671 |
format | conference_proceeding |
fullrecord | <record><control><sourceid>ieee_6IE</sourceid><recordid>TN_cdi_ieee_primary_5700671</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>5700671</ieee_id><sourcerecordid>5700671</sourcerecordid><originalsourceid>FETCH-LOGICAL-i90t-c48da8ea5891f68713269d5000ee3d8536ef9dbcd8c50502d7ebb73d966d9a1c3</originalsourceid><addsrcrecordid>eNpVUM1qwzAY8xiDjS5P0ItfIJ1_4r_jCFlXyBiD3otjf2493KQk7mBvv4z2Ul2EhBBCCC0pWVFKzMumbtq6WTEyG0IRIhW9Q4VRmlasqiRTRt3faMUfUTFN32SGYIoT84S-PgYPKfZ7PASc4XiC0ebzCBhCAJfx0ON8GGE6DMnjnyFlu4f_aGdTilOODq8B53PfX0remu0zegg2TVBceYG2s1u_l-3nelO_tmU0JJeu0t5qsEIbGqRWlDNpvJiXAXCvBZcQjO-c104QQZhX0HWKeyOlN5Y6vkDLS20EgN1pjEc7_u6uP_A_tsFRkQ</addsrcrecordid><sourcetype>Publisher</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype></control><display><type>conference_proceeding</type><title>Modeling of temperature effect on threshold voltage of ballistic Ge tunneling FET</title><source>IEEE Electronic Library (IEL) Conference Proceedings</source><creator>Siddiqui, S A ; Zubair, A ; Shoron, O F ; Khosru, Q D M</creator><creatorcontrib>Siddiqui, S A ; Zubair, A ; Shoron, O F ; Khosru, Q D M</creatorcontrib><description>The effect of temperature and scaling of gate length on the threshold voltage of double gate Ge tunneling FET has been studied. The threshold voltage has been determined from transconductance rather than constant current method. In the 10 nm to 50 nm range scaling has almost no effect on threshold voltage. However, threshold voltage is function of temperature in the range of 250-500 K. Besides, a simple model for threshold voltage incorporating the temperature effect has been developed for ballistic Ge tunneling FET based on the simulated results.</description><identifier>ISBN: 9781424462773</identifier><identifier>ISBN: 1424462770</identifier><identifier>EISBN: 9781424462797</identifier><identifier>EISBN: 1424462797</identifier><identifier>EISBN: 9781424462803</identifier><identifier>EISBN: 1424462800</identifier><identifier>DOI: 10.1109/ICELCE.2010.5700671</identifier><language>eng</language><publisher>IEEE</publisher><subject>band to band tunneling ; FETs ; gate threshold voltage ; Logic gates ; scaling ; temperature ; Temperature distribution ; Threshold voltage ; Transconductance ; Tunnel FET ; Tunneling</subject><ispartof>International Conference on Electrical & Computer Engineering (ICECE 2010), 2010, p.235-238</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/5700671$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,780,784,789,790,2058,27925,54920</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/5700671$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Siddiqui, S A</creatorcontrib><creatorcontrib>Zubair, A</creatorcontrib><creatorcontrib>Shoron, O F</creatorcontrib><creatorcontrib>Khosru, Q D M</creatorcontrib><title>Modeling of temperature effect on threshold voltage of ballistic Ge tunneling FET</title><title>International Conference on Electrical & Computer Engineering (ICECE 2010)</title><addtitle>ICELCE</addtitle><description>The effect of temperature and scaling of gate length on the threshold voltage of double gate Ge tunneling FET has been studied. The threshold voltage has been determined from transconductance rather than constant current method. In the 10 nm to 50 nm range scaling has almost no effect on threshold voltage. However, threshold voltage is function of temperature in the range of 250-500 K. Besides, a simple model for threshold voltage incorporating the temperature effect has been developed for ballistic Ge tunneling FET based on the simulated results.</description><subject>band to band tunneling</subject><subject>FETs</subject><subject>gate threshold voltage</subject><subject>Logic gates</subject><subject>scaling</subject><subject>temperature</subject><subject>Temperature distribution</subject><subject>Threshold voltage</subject><subject>Transconductance</subject><subject>Tunnel FET</subject><subject>Tunneling</subject><isbn>9781424462773</isbn><isbn>1424462770</isbn><isbn>9781424462797</isbn><isbn>1424462797</isbn><isbn>9781424462803</isbn><isbn>1424462800</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2010</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><recordid>eNpVUM1qwzAY8xiDjS5P0ItfIJ1_4r_jCFlXyBiD3otjf2493KQk7mBvv4z2Ul2EhBBCCC0pWVFKzMumbtq6WTEyG0IRIhW9Q4VRmlasqiRTRt3faMUfUTFN32SGYIoT84S-PgYPKfZ7PASc4XiC0ebzCBhCAJfx0ON8GGE6DMnjnyFlu4f_aGdTilOODq8B53PfX0remu0zegg2TVBceYG2s1u_l-3nelO_tmU0JJeu0t5qsEIbGqRWlDNpvJiXAXCvBZcQjO-c104QQZhX0HWKeyOlN5Y6vkDLS20EgN1pjEc7_u6uP_A_tsFRkQ</recordid><startdate>201012</startdate><enddate>201012</enddate><creator>Siddiqui, S A</creator><creator>Zubair, A</creator><creator>Shoron, O F</creator><creator>Khosru, Q D M</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>201012</creationdate><title>Modeling of temperature effect on threshold voltage of ballistic Ge tunneling FET</title><author>Siddiqui, S A ; Zubair, A ; Shoron, O F ; Khosru, Q D M</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i90t-c48da8ea5891f68713269d5000ee3d8536ef9dbcd8c50502d7ebb73d966d9a1c3</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2010</creationdate><topic>band to band tunneling</topic><topic>FETs</topic><topic>gate threshold voltage</topic><topic>Logic gates</topic><topic>scaling</topic><topic>temperature</topic><topic>Temperature distribution</topic><topic>Threshold voltage</topic><topic>Transconductance</topic><topic>Tunnel FET</topic><topic>Tunneling</topic><toplevel>online_resources</toplevel><creatorcontrib>Siddiqui, S A</creatorcontrib><creatorcontrib>Zubair, A</creatorcontrib><creatorcontrib>Shoron, O F</creatorcontrib><creatorcontrib>Khosru, Q D M</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE/IET Electronic Library</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Siddiqui, S A</au><au>Zubair, A</au><au>Shoron, O F</au><au>Khosru, Q D M</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Modeling of temperature effect on threshold voltage of ballistic Ge tunneling FET</atitle><btitle>International Conference on Electrical & Computer Engineering (ICECE 2010)</btitle><stitle>ICELCE</stitle><date>2010-12</date><risdate>2010</risdate><spage>235</spage><epage>238</epage><pages>235-238</pages><isbn>9781424462773</isbn><isbn>1424462770</isbn><eisbn>9781424462797</eisbn><eisbn>1424462797</eisbn><eisbn>9781424462803</eisbn><eisbn>1424462800</eisbn><abstract>The effect of temperature and scaling of gate length on the threshold voltage of double gate Ge tunneling FET has been studied. The threshold voltage has been determined from transconductance rather than constant current method. In the 10 nm to 50 nm range scaling has almost no effect on threshold voltage. However, threshold voltage is function of temperature in the range of 250-500 K. Besides, a simple model for threshold voltage incorporating the temperature effect has been developed for ballistic Ge tunneling FET based on the simulated results.</abstract><pub>IEEE</pub><doi>10.1109/ICELCE.2010.5700671</doi><tpages>4</tpages></addata></record> |
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subjects | band to band tunneling FETs gate threshold voltage Logic gates scaling temperature Temperature distribution Threshold voltage Transconductance Tunnel FET Tunneling |
title | Modeling of temperature effect on threshold voltage of ballistic Ge tunneling FET |
url | http://sfxeu10.hosted.exlibrisgroup.com/loughborough?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-04T23%3A24%3A29IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-ieee_6IE&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=Modeling%20of%20temperature%20effect%20on%20threshold%20voltage%20of%20ballistic%20Ge%20tunneling%20FET&rft.btitle=International%20Conference%20on%20Electrical%20&%20Computer%20Engineering%20(ICECE%202010)&rft.au=Siddiqui,%20S%20A&rft.date=2010-12&rft.spage=235&rft.epage=238&rft.pages=235-238&rft.isbn=9781424462773&rft.isbn_list=1424462770&rft_id=info:doi/10.1109/ICELCE.2010.5700671&rft.eisbn=9781424462797&rft.eisbn_list=1424462797&rft.eisbn_list=9781424462803&rft.eisbn_list=1424462800&rft_dat=%3Cieee_6IE%3E5700671%3C/ieee_6IE%3E%3Cgrp_id%3Ecdi_FETCH-LOGICAL-i90t-c48da8ea5891f68713269d5000ee3d8536ef9dbcd8c50502d7ebb73d966d9a1c3%3C/grp_id%3E%3Coa%3E%3C/oa%3E%3Curl%3E%3C/url%3E&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=5700671&rfr_iscdi=true |