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Design and fabrication of Si-neuroprobe arrays
In this work we proposed designs and demonstrated the fabrication of silicon microprobes for neural prosthesis. Silicon probes of various sizes, cross-sectional shapes and involving different probe encapsulation bio-compatible materials such as Polyimide were fabricated. Especially, isotropically et...
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creator | Murthy, B Ramana Ramakrishna, Kotlanka Ranganathan, N Teh Poh Giao Tay, Guang Kai Ignatius Minkyu Je Agarwal, Ajay |
description | In this work we proposed designs and demonstrated the fabrication of silicon microprobes for neural prosthesis. Silicon probes of various sizes, cross-sectional shapes and involving different probe encapsulation bio-compatible materials such as Polyimide were fabricated. Especially, isotropically etched (for Si) probes find significant application to reduce tissue trauma during implant. Our approach of using fully CMOS compatible silicon wafer processing with 200mm diameter silicon wafers is to subsequently serve as an enabling platform for manufacture-able process leading to low cost neurodevices. Silicon probes thus fabricated were packaged in order to demonstrate the complete product cycle- "Design-to-Packaging". |
doi_str_mv | 10.1109/EPTC.2010.5702758 |
format | conference_proceeding |
fullrecord | <record><control><sourceid>ieee_6IE</sourceid><recordid>TN_cdi_ieee_primary_5702758</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>5702758</ieee_id><sourcerecordid>5702758</sourcerecordid><originalsourceid>FETCH-LOGICAL-i175t-70cc28c6a07a5c9f28526be27c550fcc6f33a4b23352f5a5b78b2299499f29943</originalsourceid><addsrcrecordid>eNpVj81KAzEUhSMiKHUeQNzMC8yY3OTmZylj_YGChdZ1uYmJRHSmJHXRt3fAbjybjw8OBw5jN4L3QnB3t1xvhx74rGg4GLRnrHHGCgVKWdRCnP9zri5ZU-snn4NgHOor1j_Emj_Glsb3NpEvOdAhT2M7pXaTuzH-lGlfJh9bKoWO9ZpdJPqqsTlxwd4el9vhuVu9Pr0M96suC4OHzvAQwAZN3BAGl8AiaB_BBESeQtBJSlIepERISOiN9QDOKTd3Z8gFu_3bzTHG3b7kbyrH3eml_AVBukOq</addsrcrecordid><sourcetype>Publisher</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype></control><display><type>conference_proceeding</type><title>Design and fabrication of Si-neuroprobe arrays</title><source>IEEE Electronic Library (IEL) Conference Proceedings</source><creator>Murthy, B Ramana ; Ramakrishna, Kotlanka ; Ranganathan, N ; Teh Poh Giao ; Tay, Guang Kai Ignatius ; Minkyu Je ; Agarwal, Ajay</creator><creatorcontrib>Murthy, B Ramana ; Ramakrishna, Kotlanka ; Ranganathan, N ; Teh Poh Giao ; Tay, Guang Kai Ignatius ; Minkyu Je ; Agarwal, Ajay</creatorcontrib><description>In this work we proposed designs and demonstrated the fabrication of silicon microprobes for neural prosthesis. Silicon probes of various sizes, cross-sectional shapes and involving different probe encapsulation bio-compatible materials such as Polyimide were fabricated. Especially, isotropically etched (for Si) probes find significant application to reduce tissue trauma during implant. Our approach of using fully CMOS compatible silicon wafer processing with 200mm diameter silicon wafers is to subsequently serve as an enabling platform for manufacture-able process leading to low cost neurodevices. Silicon probes thus fabricated were packaged in order to demonstrate the complete product cycle- "Design-to-Packaging".</description><identifier>ISBN: 9781424485604</identifier><identifier>ISBN: 1424485606</identifier><identifier>EISBN: 9781424485611</identifier><identifier>EISBN: 1424485614</identifier><identifier>EISBN: 1424485622</identifier><identifier>EISBN: 9781424485628</identifier><identifier>DOI: 10.1109/EPTC.2010.5702758</identifier><language>eng</language><publisher>IEEE</publisher><subject>Brain ; Fabrication ; Metals ; Polyimides ; Probes ; Shape ; Silicon</subject><ispartof>2010 12th Electronics Packaging Technology Conference, 2010, p.796-800</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/5702758$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,780,784,789,790,2058,27925,54920</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/5702758$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Murthy, B Ramana</creatorcontrib><creatorcontrib>Ramakrishna, Kotlanka</creatorcontrib><creatorcontrib>Ranganathan, N</creatorcontrib><creatorcontrib>Teh Poh Giao</creatorcontrib><creatorcontrib>Tay, Guang Kai Ignatius</creatorcontrib><creatorcontrib>Minkyu Je</creatorcontrib><creatorcontrib>Agarwal, Ajay</creatorcontrib><title>Design and fabrication of Si-neuroprobe arrays</title><title>2010 12th Electronics Packaging Technology Conference</title><addtitle>EPTC</addtitle><description>In this work we proposed designs and demonstrated the fabrication of silicon microprobes for neural prosthesis. Silicon probes of various sizes, cross-sectional shapes and involving different probe encapsulation bio-compatible materials such as Polyimide were fabricated. Especially, isotropically etched (for Si) probes find significant application to reduce tissue trauma during implant. Our approach of using fully CMOS compatible silicon wafer processing with 200mm diameter silicon wafers is to subsequently serve as an enabling platform for manufacture-able process leading to low cost neurodevices. Silicon probes thus fabricated were packaged in order to demonstrate the complete product cycle- "Design-to-Packaging".</description><subject>Brain</subject><subject>Fabrication</subject><subject>Metals</subject><subject>Polyimides</subject><subject>Probes</subject><subject>Shape</subject><subject>Silicon</subject><isbn>9781424485604</isbn><isbn>1424485606</isbn><isbn>9781424485611</isbn><isbn>1424485614</isbn><isbn>1424485622</isbn><isbn>9781424485628</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2010</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><recordid>eNpVj81KAzEUhSMiKHUeQNzMC8yY3OTmZylj_YGChdZ1uYmJRHSmJHXRt3fAbjybjw8OBw5jN4L3QnB3t1xvhx74rGg4GLRnrHHGCgVKWdRCnP9zri5ZU-snn4NgHOor1j_Emj_Glsb3NpEvOdAhT2M7pXaTuzH-lGlfJh9bKoWO9ZpdJPqqsTlxwd4el9vhuVu9Pr0M96suC4OHzvAQwAZN3BAGl8AiaB_BBESeQtBJSlIepERISOiN9QDOKTd3Z8gFu_3bzTHG3b7kbyrH3eml_AVBukOq</recordid><startdate>201012</startdate><enddate>201012</enddate><creator>Murthy, B Ramana</creator><creator>Ramakrishna, Kotlanka</creator><creator>Ranganathan, N</creator><creator>Teh Poh Giao</creator><creator>Tay, Guang Kai Ignatius</creator><creator>Minkyu Je</creator><creator>Agarwal, Ajay</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>201012</creationdate><title>Design and fabrication of Si-neuroprobe arrays</title><author>Murthy, B Ramana ; Ramakrishna, Kotlanka ; Ranganathan, N ; Teh Poh Giao ; Tay, Guang Kai Ignatius ; Minkyu Je ; Agarwal, Ajay</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i175t-70cc28c6a07a5c9f28526be27c550fcc6f33a4b23352f5a5b78b2299499f29943</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2010</creationdate><topic>Brain</topic><topic>Fabrication</topic><topic>Metals</topic><topic>Polyimides</topic><topic>Probes</topic><topic>Shape</topic><topic>Silicon</topic><toplevel>online_resources</toplevel><creatorcontrib>Murthy, B Ramana</creatorcontrib><creatorcontrib>Ramakrishna, Kotlanka</creatorcontrib><creatorcontrib>Ranganathan, N</creatorcontrib><creatorcontrib>Teh Poh Giao</creatorcontrib><creatorcontrib>Tay, Guang Kai Ignatius</creatorcontrib><creatorcontrib>Minkyu Je</creatorcontrib><creatorcontrib>Agarwal, Ajay</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Murthy, B Ramana</au><au>Ramakrishna, Kotlanka</au><au>Ranganathan, N</au><au>Teh Poh Giao</au><au>Tay, Guang Kai Ignatius</au><au>Minkyu Je</au><au>Agarwal, Ajay</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Design and fabrication of Si-neuroprobe arrays</atitle><btitle>2010 12th Electronics Packaging Technology Conference</btitle><stitle>EPTC</stitle><date>2010-12</date><risdate>2010</risdate><spage>796</spage><epage>800</epage><pages>796-800</pages><isbn>9781424485604</isbn><isbn>1424485606</isbn><eisbn>9781424485611</eisbn><eisbn>1424485614</eisbn><eisbn>1424485622</eisbn><eisbn>9781424485628</eisbn><abstract>In this work we proposed designs and demonstrated the fabrication of silicon microprobes for neural prosthesis. Silicon probes of various sizes, cross-sectional shapes and involving different probe encapsulation bio-compatible materials such as Polyimide were fabricated. Especially, isotropically etched (for Si) probes find significant application to reduce tissue trauma during implant. Our approach of using fully CMOS compatible silicon wafer processing with 200mm diameter silicon wafers is to subsequently serve as an enabling platform for manufacture-able process leading to low cost neurodevices. Silicon probes thus fabricated were packaged in order to demonstrate the complete product cycle- "Design-to-Packaging".</abstract><pub>IEEE</pub><doi>10.1109/EPTC.2010.5702758</doi><tpages>5</tpages></addata></record> |
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subjects | Brain Fabrication Metals Polyimides Probes Shape Silicon |
title | Design and fabrication of Si-neuroprobe arrays |
url | http://sfxeu10.hosted.exlibrisgroup.com/loughborough?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-04T04%3A04%3A30IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-ieee_6IE&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=Design%20and%20fabrication%20of%20Si-neuroprobe%20arrays&rft.btitle=2010%2012th%20Electronics%20Packaging%20Technology%20Conference&rft.au=Murthy,%20B%20Ramana&rft.date=2010-12&rft.spage=796&rft.epage=800&rft.pages=796-800&rft.isbn=9781424485604&rft.isbn_list=1424485606&rft_id=info:doi/10.1109/EPTC.2010.5702758&rft.eisbn=9781424485611&rft.eisbn_list=1424485614&rft.eisbn_list=1424485622&rft.eisbn_list=9781424485628&rft_dat=%3Cieee_6IE%3E5702758%3C/ieee_6IE%3E%3Cgrp_id%3Ecdi_FETCH-LOGICAL-i175t-70cc28c6a07a5c9f28526be27c550fcc6f33a4b23352f5a5b78b2299499f29943%3C/grp_id%3E%3Coa%3E%3C/oa%3E%3Curl%3E%3C/url%3E&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=5702758&rfr_iscdi=true |